Rev 157 Rev 180
Line 1... Line 1...
1 ÀÄmain 1 ÀÄmain
2 ÀÄMAIN 0/424 Ram=12 2 ÀÄMAIN 0/426 Ram=12
3 ÃÄ??0?? 3 ÃÄ??0??
4 ÃÄlcd_init 0/61 Ram=2 4 ÃÄlcd_init 0/61 Ram=2
5 ³ ÃÄ@delay_ms1 0/24 Ram=1 5 ³ ÃÄ@delay_ms1 0/24 Ram=1
6 ³ ÃÄ@delay_ms1 0/24 Ram=1 6 ³ ÃÄ@delay_ms1 0/24 Ram=1
7 ³ ÃÄlcd_send_nibble 0/21 Ram=4 7 ³ ÃÄlcd_send_nibble 0/21 Ram=4
Line 11... Line 11...
11 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 11 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
12 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 12 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
13 ³ ÀÄ@delay_ms1 0/24 Ram=1 13 ³ ÀÄ@delay_ms1 0/24 Ram=1
14 ÃÄ@ITOF 0/29 Ram=2 14 ÃÄ@ITOF 0/29 Ram=2
15 ÃÄ@MULFF 0/117 Ram=13 15 ÃÄ@MULFF 0/117 Ram=13
-   16 ÃÄ@MULFF 0/117 Ram=13
16 ÃÄ@const78 0/19 Ram=0 17 ÃÄ@const78 0/20 Ram=0
17 ÃÄlcd_putc 0/51 Ram=1 18 ÃÄlcd_putc 0/51 Ram=1
18 ³ ÃÄlcd_send_byte 0/24 Ram=2 19 ³ ÃÄlcd_send_byte 0/24 Ram=2
19 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 20 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
20 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 21 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
21 ³ ÃÄ@delay_ms1 0/24 Ram=1 22 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 112... Line 113...
112 ³ ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 113 ³ ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
113 ³ ³ ÀÄlcd_send_byte 0/24 Ram=2 114 ³ ³ ÀÄlcd_send_byte 0/24 Ram=2
114 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 115 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
115 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 116 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
116 ³ ÀÄ@DIV3232 0/66 Ram=13 117 ³ ÀÄ@DIV3232 0/66 Ram=13
117 ÃÄ@const78 0/19 Ram=0 118 ÃÄ@const78 0/20 Ram=0
118 ÃÄlcd_putc 0/51 Ram=1 119 ÃÄlcd_putc 0/51 Ram=1
119 ³ ÃÄlcd_send_byte 0/24 Ram=2 120 ³ ÃÄlcd_send_byte 0/24 Ram=2
120 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 121 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
121 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 122 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
122 ³ ÃÄ@delay_ms1 0/24 Ram=1 123 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 132... Line 133...
132 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 133 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
133 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 134 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
134 ³ ÀÄlcd_send_byte 0/24 Ram=2 135 ³ ÀÄlcd_send_byte 0/24 Ram=2
135 ³ ÃÄlcd_send_nibble 0/21 Ram=4 136 ³ ÃÄlcd_send_nibble 0/21 Ram=4
136 ³ ÀÄlcd_send_nibble 0/21 Ram=4 137 ³ ÀÄlcd_send_nibble 0/21 Ram=4
137 ÃÄ@const87 0/17 Ram=0 138 ÃÄ@const87 0/19 Ram=0
138 ÃÄlcd_putc 0/51 Ram=1 139 ÃÄlcd_putc 0/51 Ram=1
139 ³ ÃÄlcd_send_byte 0/24 Ram=2 140 ³ ÃÄlcd_send_byte 0/24 Ram=2
140 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 141 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
141 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 142 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
142 ³ ÃÄ@delay_ms1 0/24 Ram=1 143 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 152... Line 153...
152 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 153 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
153 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 154 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
154 ³ ÀÄlcd_send_byte 0/24 Ram=2 155 ³ ÀÄlcd_send_byte 0/24 Ram=2
155 ³ ÃÄlcd_send_nibble 0/21 Ram=4 156 ³ ÃÄlcd_send_nibble 0/21 Ram=4
156 ³ ÀÄlcd_send_nibble 0/21 Ram=4 157 ³ ÀÄlcd_send_nibble 0/21 Ram=4
157 ÃÄ@delay_ms1 0/24 Ram=1 -  
158 ÃÄ@MULFF 0/117 Ram=13 158 ÃÄ@MULFF 0/117 Ram=13
159 ÃÄ@const88 0/19 Ram=0 159 ÃÄ@const88 0/20 Ram=0
160 ÃÄlcd_putc 0/51 Ram=1 160 ÃÄlcd_putc 0/51 Ram=1
161 ³ ÃÄlcd_send_byte 0/24 Ram=2 161 ³ ÃÄlcd_send_byte 0/24 Ram=2
162 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 162 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
163 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 163 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
164 ³ ÃÄ@delay_ms1 0/24 Ram=1 164 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 255... Line 255...
255 ³ ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 255 ³ ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
256 ³ ³ ÀÄlcd_send_byte 0/24 Ram=2 256 ³ ³ ÀÄlcd_send_byte 0/24 Ram=2
257 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 257 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
258 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 258 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
259 ³ ÀÄ@DIV3232 0/66 Ram=13 259 ³ ÀÄ@DIV3232 0/66 Ram=13
260 ÃÄ@const88 0/19 Ram=0 260 ÃÄ@const88 0/20 Ram=0
261 ÃÄlcd_putc 0/51 Ram=1 261 ÃÄlcd_putc 0/51 Ram=1
262 ³ ÃÄlcd_send_byte 0/24 Ram=2 262 ³ ÃÄlcd_send_byte 0/24 Ram=2
263 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 263 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
264 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 264 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
265 ³ ÃÄ@delay_ms1 0/24 Ram=1 265 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 275... Line 275...
275 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 275 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
276 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 276 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
277 ³ ÀÄlcd_send_byte 0/24 Ram=2 277 ³ ÀÄlcd_send_byte 0/24 Ram=2
278 ³ ÃÄlcd_send_nibble 0/21 Ram=4 278 ³ ÃÄlcd_send_nibble 0/21 Ram=4
279 ³ ÀÄlcd_send_nibble 0/21 Ram=4 279 ³ ÀÄlcd_send_nibble 0/21 Ram=4
280 ÃÄ@const89 0/17 Ram=0 280 ÃÄ@const89 0/20 Ram=0
281 ÃÄlcd_putc 0/51 Ram=1 281 ÃÄlcd_putc 0/51 Ram=1
282 ³ ÃÄlcd_send_byte 0/24 Ram=2 282 ³ ÃÄlcd_send_byte 0/24 Ram=2
283 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 283 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
284 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 284 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
285 ³ ÃÄ@delay_ms1 0/24 Ram=1 285 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 295... Line 295...
295 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 295 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
296 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 296 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
297 ³ ÀÄlcd_send_byte 0/24 Ram=2 297 ³ ÀÄlcd_send_byte 0/24 Ram=2
298 ³ ÃÄlcd_send_nibble 0/21 Ram=4 298 ³ ÃÄlcd_send_nibble 0/21 Ram=4
299 ³ ÀÄlcd_send_nibble 0/21 Ram=4 299 ³ ÀÄlcd_send_nibble 0/21 Ram=4
300 ÃÄ@delay_ms1 0/24 Ram=1 -  
301 ÃÄ@MULFF 0/117 Ram=13 -  
302 ÃÄ@const90 0/19 Ram=0 300 ÃÄ@const90 0/21 Ram=0
303 ÃÄlcd_putc 0/51 Ram=1 301 ÃÄlcd_putc 0/51 Ram=1
304 ³ ÃÄlcd_send_byte 0/24 Ram=2 302 ³ ÃÄlcd_send_byte 0/24 Ram=2
305 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 303 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
306 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 304 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
307 ³ ÃÄ@delay_ms1 0/24 Ram=1 305 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 398... Line 396...
398 ³ ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 396 ³ ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
399 ³ ³ ÀÄlcd_send_byte 0/24 Ram=2 397 ³ ³ ÀÄlcd_send_byte 0/24 Ram=2
400 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 398 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
401 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 399 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
402 ³ ÀÄ@DIV3232 0/66 Ram=13 400 ³ ÀÄ@DIV3232 0/66 Ram=13
403 ÃÄ@const90 0/19 Ram=0 401 ÃÄ@const90 0/21 Ram=0
404 ÃÄlcd_putc 0/51 Ram=1 402 ÃÄlcd_putc 0/51 Ram=1
405 ³ ÃÄlcd_send_byte 0/24 Ram=2 403 ³ ÃÄlcd_send_byte 0/24 Ram=2
406 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 404 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
407 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 405 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
408 ³ ÃÄ@delay_ms1 0/24 Ram=1 406 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 418... Line 416...
418 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 416 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
419 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 417 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
420 ³ ÀÄlcd_send_byte 0/24 Ram=2 418 ³ ÀÄlcd_send_byte 0/24 Ram=2
421 ³ ÃÄlcd_send_nibble 0/21 Ram=4 419 ³ ÃÄlcd_send_nibble 0/21 Ram=4
422 ³ ÀÄlcd_send_nibble 0/21 Ram=4 420 ³ ÀÄlcd_send_nibble 0/21 Ram=4
423 ÃÄ@const91 0/17 Ram=0 421 ÃÄ@const91 0/21 Ram=0
424 ÃÄlcd_putc 0/51 Ram=1 422 ÃÄlcd_putc 0/51 Ram=1
425 ³ ÃÄlcd_send_byte 0/24 Ram=2 423 ³ ÃÄlcd_send_byte 0/24 Ram=2
426 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 424 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
427 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 425 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
428 ³ ÃÄ@delay_ms1 0/24 Ram=1 426 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 438... Line 436...
438 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 436 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
439 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 437 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
440 ³ ÀÄlcd_send_byte 0/24 Ram=2 438 ³ ÀÄlcd_send_byte 0/24 Ram=2
441 ³ ÃÄlcd_send_nibble 0/21 Ram=4 439 ³ ÃÄlcd_send_nibble 0/21 Ram=4
442 ³ ÀÄlcd_send_nibble 0/21 Ram=4 440 ³ ÀÄlcd_send_nibble 0/21 Ram=4
443 ÃÄ@delay_ms1 0/24 Ram=1 441 ÃÄ@MULFF 0/117 Ram=13
444 ÃÄ@const92 0/20 Ram=0 442 ÃÄ@const92 0/21 Ram=0
445 ÃÄlcd_putc 0/51 Ram=1 443 ÃÄlcd_putc 0/51 Ram=1
446 ³ ÃÄlcd_send_byte 0/24 Ram=2 444 ³ ÃÄlcd_send_byte 0/24 Ram=2
447 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 445 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
448 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 446 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
449 ³ ÃÄ@delay_ms1 0/24 Ram=1 447 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 540... Line 538...
540 ³ ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 538 ³ ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
541 ³ ³ ÀÄlcd_send_byte 0/24 Ram=2 539 ³ ³ ÀÄlcd_send_byte 0/24 Ram=2
542 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 540 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
543 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 541 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
544 ³ ÀÄ@DIV3232 0/66 Ram=13 542 ³ ÀÄ@DIV3232 0/66 Ram=13
545 ÃÄ@const92 0/20 Ram=0 543 ÃÄ@const92 0/21 Ram=0
546 ÃÄlcd_putc 0/51 Ram=1 544 ÃÄlcd_putc 0/51 Ram=1
547 ³ ÃÄlcd_send_byte 0/24 Ram=2 545 ³ ÃÄlcd_send_byte 0/24 Ram=2
548 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 546 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
549 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 547 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
550 ³ ÃÄ@delay_ms1 0/24 Ram=1 548 ³ ÃÄ@delay_ms1 0/24 Ram=1
Line 560... Line 558...
560 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 558 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
561 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 559 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
562 ³ ÀÄlcd_send_byte 0/24 Ram=2 560 ³ ÀÄlcd_send_byte 0/24 Ram=2
563 ³ ÃÄlcd_send_nibble 0/21 Ram=4 561 ³ ÃÄlcd_send_nibble 0/21 Ram=4
564 ³ ÀÄlcd_send_nibble 0/21 Ram=4 562 ³ ÀÄlcd_send_nibble 0/21 Ram=4
565 ÃÄ@const93 0/17 Ram=0 563 ÃÄ@const93 0/21 Ram=0
566 ÃÄlcd_putc 0/51 Ram=1 564 ÃÄlcd_putc 0/51 Ram=1
567 ³ ÃÄlcd_send_byte 0/24 Ram=2 565 ³ ÃÄlcd_send_byte 0/24 Ram=2
568 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4 566 ³ ³ ÃÄlcd_send_nibble 0/21 Ram=4
569 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4 567 ³ ³ ÀÄlcd_send_nibble 0/21 Ram=4
570 ³ ÃÄ@delay_ms1 0/24 Ram=1 568 ³ ÃÄ@delay_ms1 0/24 Ram=1