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**** 08/21/07 15:28:32 ************** PSpice Lite (Jan 2005) *****************
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**** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
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 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ] 
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 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ] 
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 ****     CIRCUIT DESCRIPTION
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 ****     CIRCUIT DESCRIPTION
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**** INCLUDING SCHEMATIC1.net ****
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**** INCLUDING SCHEMATIC1.net ****
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* source RECEIVER
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* source RECEIVER
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C_C1         0 N03478  15nF  
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C_C1         0 N03478  15nF  
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V_V2         N03432 0 DC 0Vdc AC 1Vac 
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V_V2         N03432 0 DC 0Vdc AC 0.001Vac 
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R_R1         0 N03490  100  
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R_R1         0 N03490  100  
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E_U1         N03510 0 VALUE {LIMIT(V(N03718,N03634)*1E6,-15V,+15V)} _U1 N03718
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E_U1         N03510 0 VALUE {LIMIT(V(N03718,N03634)*1E6,-15V,+15V)} _U1 N03718
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+  N03634 1G
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+  N03634 1G
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R_R4         N03718 N03462  6.8k  
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R_R4         N03718 N03462  6.8k  
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C_C2         N03518 N03510  1n  
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C_C2         N03518 N03510  1n  
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R_R6         N03774 N03782  20k  
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R_R6         N03774 N03782  20k  
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R_R7         0 N03774  100000k  
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R_R7         0 N03774  100000k  
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V_V1         N03462 0 12Vdc
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V_V1         N03462 0 12Vdc
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R_R2         N03634 N03510  100k  
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R_R2         N03634 N03510  100k  
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L_L1         N03462 N03478  3900uH  
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L_L1         N03462 N03478  4900uH  
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C_C3         N03634 N03510  270pF  
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C_C3         N03634 N03510  100pF  
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X_TX1    N03518 0 N03782 N03774 SCHEMATIC1_TX1 
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X_TX1    N03518 0 N03782 N03774 SCHEMATIC1_TX1 
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J_J1         N03478 N03432 N03490 JbreakN 
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J_J1         N03478 N03432 N03490 JbreakN 
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C_C4         N03622 N03634  1nF  
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C_C4         N03622 N03634  4.7nF  
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R_R3         0 N03622  10k  
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R_R3         0 N03622  10k  
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.subckt SCHEMATIC1_TX1 1 2 3 4  
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.subckt SCHEMATIC1_TX1 1 2 3 4  
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L1_TX1         1 2 1000
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L1_TX1         1 2 1000
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L2_TX1         3 4 1000
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L2_TX1         3 4 1000
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.ends SCHEMATIC1_TX1
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.ends SCHEMATIC1_TX1
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**** RESUMING test.cir ****
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**** RESUMING test.cir ****
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.END
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.END
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**** 08/21/07 15:28:32 ************** PSpice Lite (Jan 2005) *****************
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**** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
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 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ] 
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 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ] 
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 ****     Junction FET MODEL PARAMETERS
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 ****     Junction FET MODEL PARAMETERS
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               NJF             
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               NJF             
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         VTO   -2            
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         VTO   -2            
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        BETA  100.000000E-06 
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        BETA  100.000000E-06 
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**** 08/21/07 15:28:32 ************** PSpice Lite (Jan 2005) *****************
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**** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
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 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ] 
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 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ] 
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 ****     Ferromagnetic Core MODEL PARAMETERS
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 ****     Ferromagnetic Core MODEL PARAMETERS
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           A   44.82         
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           A   44.82         
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           C     .4112       
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           C     .4112       
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           K   25.74         
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           K   25.74         
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**** 08/21/07 15:28:32 ************** PSpice Lite (Jan 2005) *****************
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**** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
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 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ] 
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 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ] 
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 ****     SMALL SIGNAL BIAS SOLUTION       TEMPERATURE =   27.000 DEG C
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 ****     SMALL SIGNAL BIAS SOLUTION       TEMPERATURE =   27.000 DEG C
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          JOB CONCLUDED
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          JOB CONCLUDED
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**** 08/21/07 15:28:32 ************** PSpice Lite (Jan 2005) *****************
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**** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
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 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ] 
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 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ] 
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 ****     JOB STATISTICS SUMMARY
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 ****     JOB STATISTICS SUMMARY
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******************************************************************************
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******************************************************************************
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  Total job time (using Solver 1)   =         .89
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  Total job time (using Solver 1)   =         .82
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