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AVRcam.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .noinit 00000030 00800300 00800300 0000119a 2**0
ALLOC
1 .bss 00000274 00800070 00800070 0000119a 2**0
ALLOC
2 .data 00000010 00800060 000010d6 0000118a 2**0
CONTENTS, ALLOC, LOAD, DATA
3 .text 000010d6 00000000 00000000 000000b4 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
4 .stab 00003f9c 00000000 00000000 0000119c 2**2
CONTENTS, READONLY, DEBUGGING
5 .stabstr 000017b7 00000000 00000000 00005138 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: 63 c0 rjmp .+198 ; 0xc8 <__init>
2: 11 c8 rjmp .-4062 ; 0xfffff026 <__eeprom_end+0xff7ef026>
4: 11 c8 rjmp .-4062 ; 0xfffff028 <__eeprom_end+0xff7ef028>
6: 7a c0 rjmp .+244 ; 0xfc <__bad_interrupt>
8: 79 c0 rjmp .+242 ; 0xfc <__bad_interrupt>
a: 78 c0 rjmp .+240 ; 0xfc <__bad_interrupt>
c: 77 c0 rjmp .+238 ; 0xfc <__bad_interrupt>
e: 76 c0 rjmp .+236 ; 0xfc <__bad_interrupt>
10: 0c c8 rjmp .-4072 ; 0xfffff02a <__eeprom_end+0xff7ef02a>
12: 74 c0 rjmp .+232 ; 0xfc <__bad_interrupt>
14: 73 c0 rjmp .+230 ; 0xfc <__bad_interrupt>
16: af c5 rjmp .+2910 ; 0xb76 <__vector_11>
18: 71 c0 rjmp .+226 ; 0xfc <__bad_interrupt>
1a: 70 c0 rjmp .+224 ; 0xfc <__bad_interrupt>
1c: 6f c0 rjmp .+222 ; 0xfc <__bad_interrupt>
1e: 6e c0 rjmp .+220 ; 0xfc <__bad_interrupt>
20: 6d c0 rjmp .+218 ; 0xfc <__bad_interrupt>
22: 14 c6 rjmp .+3112 ; 0xc4c <__vector_17>
24: 6b c0 rjmp .+214 ; 0xfc <__bad_interrupt>
00000026 <__ctors_end>:
26: 2e c6 rjmp .+3164 ; 0xc84 <__vector_17+0x38>
28: c1 c6 rjmp .+3458 ; 0xdac <__vector_17+0x160>
2a: c0 c6 rjmp .+3456 ; 0xdac <__vector_17+0x160>
2c: bf c6 rjmp .+3454 ; 0xdac <__vector_17+0x160>
2e: be c6 rjmp .+3452 ; 0xdac <__vector_17+0x160>
30: bd c6 rjmp .+3450 ; 0xdac <__vector_17+0x160>
32: bc c6 rjmp .+3448 ; 0xdac <__vector_17+0x160>
34: bb c6 rjmp .+3446 ; 0xdac <__vector_17+0x160>
36: 26 c6 rjmp .+3148 ; 0xc84 <__vector_17+0x38>
38: b9 c6 rjmp .+3442 ; 0xdac <__vector_17+0x160>
3a: b8 c6 rjmp .+3440 ; 0xdac <__vector_17+0x160>
3c: b7 c6 rjmp .+3438 ; 0xdac <__vector_17+0x160>
3e: b6 c6 rjmp .+3436 ; 0xdac <__vector_17+0x160>
40: b5 c6 rjmp .+3434 ; 0xdac <__vector_17+0x160>
42: b4 c6 rjmp .+3432 ; 0xdac <__vector_17+0x160>
44: b3 c6 rjmp .+3430 ; 0xdac <__vector_17+0x160>
46: 36 c6 rjmp .+3180 ; 0xcb4 <__vector_17+0x68>
48: b1 c6 rjmp .+3426 ; 0xdac <__vector_17+0x160>
4a: b0 c6 rjmp .+3424 ; 0xdac <__vector_17+0x160>
4c: af c6 rjmp .+3422 ; 0xdac <__vector_17+0x160>
4e: ae c6 rjmp .+3420 ; 0xdac <__vector_17+0x160>
50: ad c6 rjmp .+3418 ; 0xdac <__vector_17+0x160>
52: ac c6 rjmp .+3416 ; 0xdac <__vector_17+0x160>
54: ab c6 rjmp .+3414 ; 0xdac <__vector_17+0x160>
56: 3e c6 rjmp .+3196 ; 0xcd4 <__vector_17+0x88>
58: a9 c6 rjmp .+3410 ; 0xdac <__vector_17+0x160>
5a: a8 c6 rjmp .+3408 ; 0xdac <__vector_17+0x160>
5c: a7 c6 rjmp .+3406 ; 0xdac <__vector_17+0x160>
5e: a6 c6 rjmp .+3404 ; 0xdac <__vector_17+0x160>
60: a5 c6 rjmp .+3402 ; 0xdac <__vector_17+0x160>
62: a4 c6 rjmp .+3400 ; 0xdac <__vector_17+0x160>
64: a3 c6 rjmp .+3398 ; 0xdac <__vector_17+0x160>
66: 3f c6 rjmp .+3198 ; 0xce6 <__vector_17+0x9a>
68: a1 c6 rjmp .+3394 ; 0xdac <__vector_17+0x160>
6a: a0 c6 rjmp .+3392 ; 0xdac <__vector_17+0x160>
6c: 9f c6 rjmp .+3390 ; 0xdac <__vector_17+0x160>
6e: 9e c6 rjmp .+3388 ; 0xdac <__vector_17+0x160>
70: 9d c6 rjmp .+3386 ; 0xdac <__vector_17+0x160>
72: 9c c6 rjmp .+3384 ; 0xdac <__vector_17+0x160>
74: 9b c6 rjmp .+3382 ; 0xdac <__vector_17+0x160>
76: 57 c6 rjmp .+3246 ; 0xd26 <__vector_17+0xda>
78: 99 c6 rjmp .+3378 ; 0xdac <__vector_17+0x160>
7a: 98 c6 rjmp .+3376 ; 0xdac <__vector_17+0x160>
7c: 97 c6 rjmp .+3374 ; 0xdac <__vector_17+0x160>
7e: 96 c6 rjmp .+3372 ; 0xdac <__vector_17+0x160>
80: 95 c6 rjmp .+3370 ; 0xdac <__vector_17+0x160>
82: 94 c6 rjmp .+3368 ; 0xdac <__vector_17+0x160>
84: 93 c6 rjmp .+3366 ; 0xdac <__vector_17+0x160>
86: 92 c6 rjmp .+3364 ; 0xdac <__vector_17+0x160>
88: 91 c6 rjmp .+3362 ; 0xdac <__vector_17+0x160>
8a: 90 c6 rjmp .+3360 ; 0xdac <__vector_17+0x160>
8c: 8f c6 rjmp .+3358 ; 0xdac <__vector_17+0x160>
8e: 8e c6 rjmp .+3356 ; 0xdac <__vector_17+0x160>
90: 8d c6 rjmp .+3354 ; 0xdac <__vector_17+0x160>
92: 8c c6 rjmp .+3352 ; 0xdac <__vector_17+0x160>
94: 8b c6 rjmp .+3350 ; 0xdac <__vector_17+0x160>
96: 50 c6 rjmp .+3232 ; 0xd38 <__vector_17+0xec>
98: 89 c6 rjmp .+3346 ; 0xdac <__vector_17+0x160>
9a: 88 c6 rjmp .+3344 ; 0xdac <__vector_17+0x160>
9c: 87 c6 rjmp .+3342 ; 0xdac <__vector_17+0x160>
9e: 86 c6 rjmp .+3340 ; 0xdac <__vector_17+0x160>
a0: 85 c6 rjmp .+3338 ; 0xdac <__vector_17+0x160>
a2: 84 c6 rjmp .+3336 ; 0xdac <__vector_17+0x160>
a4: 83 c6 rjmp .+3334 ; 0xdac <__vector_17+0x160>
a6: 16 c6 rjmp .+3116 ; 0xcd4 <__vector_17+0x88>
a8: 81 c6 rjmp .+3330 ; 0xdac <__vector_17+0x160>
aa: 80 c6 rjmp .+3328 ; 0xdac <__vector_17+0x160>
ac: 7f c6 rjmp .+3326 ; 0xdac <__vector_17+0x160>
ae: 7e c6 rjmp .+3324 ; 0xdac <__vector_17+0x160>
b0: 7d c6 rjmp .+3322 ; 0xdac <__vector_17+0x160>
b2: 7c c6 rjmp .+3320 ; 0xdac <__vector_17+0x160>
b4: 7b c6 rjmp .+3318 ; 0xdac <__vector_17+0x160>
b6: 51 c6 rjmp .+3234 ; 0xd5a <__vector_17+0x10e>
b8: 79 c6 rjmp .+3314 ; 0xdac <__vector_17+0x160>
ba: 78 c6 rjmp .+3312 ; 0xdac <__vector_17+0x160>
bc: 77 c6 rjmp .+3310 ; 0xdac <__vector_17+0x160>
be: 76 c6 rjmp .+3308 ; 0xdac <__vector_17+0x160>
c0: 75 c6 rjmp .+3306 ; 0xdac <__vector_17+0x160>
c2: 74 c6 rjmp .+3304 ; 0xdac <__vector_17+0x160>
c4: 73 c6 rjmp .+3302 ; 0xdac <__vector_17+0x160>
c6: 64 c6 rjmp .+3272 ; 0xd90 <__vector_17+0x144>
000000c8 <__init>:
c8: 11 24 eor r1, r1
ca: 1f be out 0x3f, r1 ; 63
cc: cf e5 ldi r28, 0x5F ; 95
ce: d4 e0 ldi r29, 0x04 ; 4
d0: de bf out 0x3e, r29 ; 62
d2: cd bf out 0x3d, r28 ; 61
000000d4 <__do_copy_data>:
d4: 10 e0 ldi r17, 0x00 ; 0
d6: a0 e6 ldi r26, 0x60 ; 96
d8: b0 e0 ldi r27, 0x00 ; 0
da: e6 ed ldi r30, 0xD6 ; 214
dc: f0 e1 ldi r31, 0x10 ; 16
de: 02 c0 rjmp .+4 ; 0xe4 <.do_copy_data_start>
000000e0 <.do_copy_data_loop>:
e0: 05 90 lpm r0, Z+
e2: 0d 92 st X+, r0
000000e4 <.do_copy_data_start>:
e4: a0 37 cpi r26, 0x70 ; 112
e6: b1 07 cpc r27, r17
e8: d9 f7 brne .-10 ; 0xe0 <.do_copy_data_loop>
000000ea <__do_clear_bss>:
ea: 12 e0 ldi r17, 0x02 ; 2
ec: a0 e7 ldi r26, 0x70 ; 112
ee: b0 e0 ldi r27, 0x00 ; 0
f0: 01 c0 rjmp .+2 ; 0xf4 <.do_clear_bss_start>
000000f2 <.do_clear_bss_loop>:
f2: 1d 92 st X+, r1
000000f4 <.do_clear_bss_start>:
f4: a4 3e cpi r26, 0xE4 ; 228
f6: b1 07 cpc r27, r17
f8: e1 f7 brne .-8 ; 0xf2 <.do_clear_bss_loop>
fa: 30 c0 rjmp .+96 ; 0x15c <main>
000000fc <__bad_interrupt>:
fc: 9d c7 rjmp .+3898 ; 0x1038 <__vector_default>
000000fe <CamInt_resetCam>:
output the clock signal. Thus, if we reset the cam, the
AVR has no clock, and thus doesn't run...
***********************************************************/
void CamInt_resetCam(void)
{
fe: 08 95 ret
00000100 <CamInt_init>:
100: 8f 9a sbi 0x11, 7 ; 17
102: 8f 9a sbi 0x11, 7 ; 17
104: 8a 98 cbi 0x11, 2 ; 17
106: 97 98 cbi 0x12, 7 ; 18
108: 87 b3 in r24, 0x17 ; 23
10a: 80 7f andi r24, 0xF0 ; 240
10c: 87 bb out 0x17, r24 ; 23
10e: 87 b3 in r24, 0x17 ; 23
110: 80 6f ori r24, 0xF0 ; 240
112: 87 bb out 0x17, r24 ; 23
114: 84 b3 in r24, 0x14 ; 20
116: 80 7f andi r24, 0xF0 ; 240
118: 84 bb out 0x14, r24 ; 20
11a: 8e b5 in r24, 0x2e ; 46
11c: 88 7f andi r24, 0xF8 ; 248
11e: 8e bd out 0x2e, r24 ; 46
120: 85 b7 in r24, 0x35 ; 53
122: 8c 60 ori r24, 0x0C ; 12
124: 85 bf out 0x35, r24 ; 53
126: 85 b7 in r24, 0x35 ; 53
128: 83 60 ori r24, 0x03 ; 3
12a: 85 bf out 0x35, r24 ; 53
12c: 8b b7 in r24, 0x3b ; 59
12e: 80 64 ori r24, 0x40 ; 64
130: 8b bf out 0x3b, r24 ; 59
132: 86 e0 ldi r24, 0x06 ; 6
134: 83 bf out 0x33, r24 ; 51
136: 85 b7 in r24, 0x35 ; 53
138: 8f 78 andi r24, 0x8F ; 143
13a: 85 bf out 0x35, r24 ; 53
13c: 85 b7 in r24, 0x35 ; 53
13e: 80 68 ori r24, 0x80 ; 128
140: 85 bf out 0x35, r24 ; 53
142: e0 e0 ldi r30, 0x00 ; 0
144: f3 e0 ldi r31, 0x03 ; 3
146: 80 e3 ldi r24, 0x30 ; 48
148: df 01 movw r26, r30
14a: 98 2f mov r25, r24
14c: 1d 92 st X+, r1
14e: 9a 95 dec r25
150: e9 f7 brne .-6 ; 0x14c <CamInt_init+0x4c>
/* Needed in order to truncate to 8 bit. */
uint8_t len;
len = (uint8_t) n;
__asm__ __volatile__ (
152: a1 e0 ldi r26, 0x01 ; 1
154: b0 e0 ldi r27, 0x00 ; 0
156: 18 2e mov r1, r24
158: ac d7 rcall .+3928 ; 0x10b2 <__eeprom_read_block_1C1D1E>
15a: 08 95 ret
0000015c <main>:
Inputs: none
Outputs: int
***********************************************************/
int main(void)
{
15c: cf e5 ldi r28, 0x5F ; 95
15e: d4 e0 ldi r29, 0x04 ; 4
160: de bf out 0x3e, r29 ; 62
162: cd bf out 0x3d, r28 ; 61
/* initialize all of the interface modules */
DebugInt_init();
164: db d6 rcall .+3510 ; 0xf1c <DebugInt_init>
UartInt_init();
166: f9 d4 rcall .+2546 ; 0xb5a <UartInt_init>
I2CInt_init();
168: 30 d5 rcall .+2656 ; 0xbca <I2CInt_init>
CamInt_init();
16a: ca df rcall .-108 ; 0x100 <CamInt_init>
/* initialize the remaining modules that will process
data...interrupts need to be on for these */
ENABLE_INTS();
16c: 78 94 sei
CamConfig_init();
16e: 8a d6 rcall .+3348 ; 0xe84 <CamConfig_init>
UIMgr_init();
170: 6a d3 rcall .+1748 ; 0x846 <UIMgr_init>
FrameMgr_init();
172: 25 d2 rcall .+1098 ; 0x5be <FrameMgr_init>
/* provide a short delay for the camera to stabilize before
we let the executive start up */
Utility_delay(1000);
174: 88 ee ldi r24, 0xE8 ; 232
176: 93 e0 ldi r25, 0x03 ; 3
178: 96 d6 rcall .+3372 ; 0xea6 <Utility_delay>
/* the rest of the application will be under the
control of the Executive. */
Exec_run();
17a: 11 d0 rcall .+34 ; 0x19e <Exec_run>
/* this should never be reached */
return(0);
}
17c: 80 e0 ldi r24, 0x00 ; 0
17e: 90 e0 ldi r25, 0x00 ; 0
180: a9 c7 rjmp .+3922 ; 0x10d4 <_exit>
00000182 <Exec_writeEventFifo>:
182: f8 94 cli
184: 90 91 70 00 lds r25, 0x0070
188: ec e6 ldi r30, 0x6C ; 108
18a: f2 e0 ldi r31, 0x02 ; 2
18c: e9 0f add r30, r25
18e: f1 1d adc r31, r1
190: 80 83 st Z, r24
192: 9f 5f subi r25, 0xFF ; 255
194: 97 70 andi r25, 0x07 ; 7
196: 90 93 70 00 sts 0x0070, r25
19a: 78 94 sei
19c: 08 95 ret
0000019e <Exec_run>:
19e: cf 93 push r28
1a0: df 93 push r29
1a2: cc e6 ldi r28, 0x6C ; 108
1a4: d2 e0 ldi r29, 0x02 ; 2
1a6: 80 91 72 00 lds r24, 0x0072
1aa: 88 23 and r24, r24
1ac: 99 f0 breq .+38 ; 0x1d4 <Exec_run+0x36>
1ae: 80 ff sbrs r24, 0
1b0: 07 c0 rjmp .+14 ; 0x1c0 <Exec_run+0x22>
1b2: f8 94 cli
1b4: 8e 7f andi r24, 0xFE ; 254
1b6: 80 93 72 00 sts 0x0072, r24
1ba: 78 94 sei
1bc: b2 d0 rcall .+356 ; 0x322 <FrameMgr_processLine>
1be: db d2 rcall .+1462 ; 0x776 <UIMgr_transmitPendingData>
1c0: 80 91 72 00 lds r24, 0x0072
1c4: 81 ff sbrs r24, 1
1c6: 06 c0 rjmp .+12 ; 0x1d4 <Exec_run+0x36>
1c8: f8 94 cli
1ca: 8d 7f andi r24, 0xFD ; 253
1cc: 80 93 72 00 sts 0x0072, r24
1d0: 78 94 sei
1d2: fc d1 rcall .+1016 ; 0x5cc <FrameMgr_acquireLine>
1d4: 90 91 71 00 lds r25, 0x0071
1d8: 80 91 70 00 lds r24, 0x0070
1dc: 89 17 cp r24, r25
1de: 19 f3 breq .-58 ; 0x1a6 <Exec_run+0x8>
1e0: f8 94 cli
1e2: fe 01 movw r30, r28
1e4: e9 0f add r30, r25
1e6: f1 1d adc r31, r1
1e8: e0 81 ld r30, Z
1ea: 89 2f mov r24, r25
1ec: 8f 5f subi r24, 0xFF ; 255
1ee: 87 70 andi r24, 0x07 ; 7
1f0: 80 93 71 00 sts 0x0071, r24
1f4: 78 94 sei
1f6: e0 31 cpi r30, 0x10 ; 16
1f8: 29 f1 breq .+74 ; 0x244 <Exec_run+0xa6>
1fa: e1 31 cpi r30, 0x11 ; 17
1fc: 60 f4 brcc .+24 ; 0x216 <Exec_run+0x78>
1fe: e2 30 cpi r30, 0x02 ; 2
200: c1 f0 breq .+48 ; 0x232 <Exec_run+0x94>
202: e3 30 cpi r30, 0x03 ; 3
204: 18 f4 brcc .+6 ; 0x20c <Exec_run+0x6e>
206: e1 30 cpi r30, 0x01 ; 1
208: 71 f6 brne .-100 ; 0x1a6 <Exec_run+0x8>
20a: 2a c0 rjmp .+84 ; 0x260 <Exec_run+0xc2>
20c: e4 30 cpi r30, 0x04 ; 4
20e: 29 f1 breq .+74 ; 0x25a <Exec_run+0xbc>
210: e8 30 cpi r30, 0x08 ; 8
212: 49 f6 brne .-110 ; 0x1a6 <Exec_run+0x8>
214: 1f c0 rjmp .+62 ; 0x254 <Exec_run+0xb6>
216: e0 38 cpi r30, 0x80 ; 128
218: 79 f0 breq .+30 ; 0x238 <Exec_run+0x9a>
21a: e1 38 cpi r30, 0x81 ; 129
21c: 20 f4 brcc .+8 ; 0x226 <Exec_run+0x88>
21e: e0 32 cpi r30, 0x20 ; 32
220: 09 f0 breq .+2 ; 0x224 <Exec_run+0x86>
222: c1 cf rjmp .-126 ; 0x1a6 <Exec_run+0x8>
224: 14 c0 rjmp .+40 ; 0x24e <Exec_run+0xb0>
226: e1 38 cpi r30, 0x81 ; 129
228: 51 f0 breq .+20 ; 0x23e <Exec_run+0xa0>
22a: e0 39 cpi r30, 0x90 ; 144
22c: 09 f0 breq .+2 ; 0x230 <Exec_run+0x92>
22e: bb cf rjmp .-138 ; 0x1a6 <Exec_run+0x8>
230: 1c c0 rjmp .+56 ; 0x26a <Exec_run+0xcc>
232: 82 e0 ldi r24, 0x02 ; 2
234: 19 d2 rcall .+1074 ; 0x668 <FrameMgr_dispatchEvent>
236: b7 cf rjmp .-146 ; 0x1a6 <Exec_run+0x8>
238: 80 e8 ldi r24, 0x80 ; 128
23a: 16 d2 rcall .+1068 ; 0x668 <FrameMgr_dispatchEvent>
23c: b4 cf rjmp .-152 ; 0x1a6 <Exec_run+0x8>
23e: 81 e8 ldi r24, 0x81 ; 129
240: 13 d2 rcall .+1062 ; 0x668 <FrameMgr_dispatchEvent>
242: b1 cf rjmp .-158 ; 0x1a6 <Exec_run+0x8>
244: 80 e1 ldi r24, 0x10 ; 16
246: 10 d2 rcall .+1056 ; 0x668 <FrameMgr_dispatchEvent>
248: 80 e1 ldi r24, 0x10 ; 16
24a: 7a d4 rcall .+2292 ; 0xb40 <UIMgr_dispatchEvent>
24c: ac cf rjmp .-168 ; 0x1a6 <Exec_run+0x8>
24e: 80 e2 ldi r24, 0x20 ; 32
250: 0b d2 rcall .+1046 ; 0x668 <FrameMgr_dispatchEvent>
252: a9 cf rjmp .-174 ; 0x1a6 <Exec_run+0x8>
254: 88 e0 ldi r24, 0x08 ; 8
256: 08 d2 rcall .+1040 ; 0x668 <FrameMgr_dispatchEvent>
258: a6 cf rjmp .-180 ; 0x1a6 <Exec_run+0x8>
25a: 84 e0 ldi r24, 0x04 ; 4
25c: 05 d2 rcall .+1034 ; 0x668 <FrameMgr_dispatchEvent>
25e: a3 cf rjmp .-186 ; 0x1a6 <Exec_run+0x8>
260: 81 e0 ldi r24, 0x01 ; 1
262: 6e d4 rcall .+2268 ; 0xb40 <UIMgr_dispatchEvent>
264: 81 e0 ldi r24, 0x01 ; 1
266: 00 d2 rcall .+1024 ; 0x668 <FrameMgr_dispatchEvent>
268: 9e cf rjmp .-196 ; 0x1a6 <Exec_run+0x8>
26a: 80 e9 ldi r24, 0x90 ; 144
26c: 69 d4 rcall .+2258 ; 0xb40 <UIMgr_dispatchEvent>
26e: 9b cf rjmp .-202 ; 0x1a6 <Exec_run+0x8>
00000270 <FrameMgr_processFrame>:
270: df 92 push r13
272: ef 92 push r14
274: ff 92 push r15
276: 0f 93 push r16
278: 1f 93 push r17
27a: cf 93 push r28
27c: df 93 push r29
27e: 20 91 60 00 lds r18, 0x0060
282: 30 91 61 00 lds r19, 0x0061
286: 80 91 73 00 lds r24, 0x0073
28a: 88 23 and r24, r24
28c: 09 f4 brne .+2 ; 0x290 <FrameMgr_processFrame+0x20>
28e: 3f c0 rjmp .+126 ; 0x30e <FrameMgr_processFrame+0x9e>
290: e9 01 movw r28, r18
292: 8a e0 ldi r24, 0x0A ; 10
294: 43 d2 rcall .+1158 ; 0x71c <UIMgr_writeTxFifo>
296: 80 91 73 00 lds r24, 0x0073
29a: 40 d2 rcall .+1152 ; 0x71c <UIMgr_writeTxFifo>
29c: dd 24 eor r13, r13
29e: 8f 81 ldd r24, Y+7 ; 0x07
2a0: 81 30 cpi r24, 0x01 ; 1
2a2: 69 f5 brne .+90 ; 0x2fe <FrameMgr_processFrame+0x8e>
2a4: 88 81 ld r24, Y
2a6: 80 38 cpi r24, 0x80 ; 128
2a8: e1 f0 breq .+56 ; 0x2e2 <FrameMgr_processFrame+0x72>
2aa: 80 34 cpi r24, 0x40 ; 64
2ac: 11 f4 brne .+4 ; 0x2b2 <FrameMgr_processFrame+0x42>
2ae: 81 e0 ldi r24, 0x01 ; 1
2b0: 19 c0 rjmp .+50 ; 0x2e4 <FrameMgr_processFrame+0x74>
2b2: 80 32 cpi r24, 0x20 ; 32
2b4: 11 f4 brne .+4 ; 0x2ba <FrameMgr_processFrame+0x4a>
2b6: 82 e0 ldi r24, 0x02 ; 2
2b8: 15 c0 rjmp .+42 ; 0x2e4 <FrameMgr_processFrame+0x74>
2ba: 80 31 cpi r24, 0x10 ; 16
2bc: 11 f4 brne .+4 ; 0x2c2 <FrameMgr_processFrame+0x52>
2be: 83 e0 ldi r24, 0x03 ; 3
2c0: 11 c0 rjmp .+34 ; 0x2e4 <FrameMgr_processFrame+0x74>
2c2: 88 30 cpi r24, 0x08 ; 8
2c4: 11 f4 brne .+4 ; 0x2ca <FrameMgr_processFrame+0x5a>
2c6: 84 e0 ldi r24, 0x04 ; 4
2c8: 0d c0 rjmp .+26 ; 0x2e4 <FrameMgr_processFrame+0x74>
2ca: 84 30 cpi r24, 0x04 ; 4
2cc: 11 f4 brne .+4 ; 0x2d2 <FrameMgr_processFrame+0x62>
2ce: 85 e0 ldi r24, 0x05 ; 5
2d0: 09 c0 rjmp .+18 ; 0x2e4 <FrameMgr_processFrame+0x74>
2d2: 82 30 cpi r24, 0x02 ; 2
2d4: 11 f4 brne .+4 ; 0x2da <FrameMgr_processFrame+0x6a>
2d6: 86 e0 ldi r24, 0x06 ; 6
2d8: 05 c0 rjmp .+10 ; 0x2e4 <FrameMgr_processFrame+0x74>
2da: 81 30 cpi r24, 0x01 ; 1
2dc: 11 f4 brne .+4 ; 0x2e2 <FrameMgr_processFrame+0x72>
2de: 87 e0 ldi r24, 0x07 ; 7
2e0: 01 c0 rjmp .+2 ; 0x2e4 <FrameMgr_processFrame+0x74>
2e2: 80 e0 ldi r24, 0x00 ; 0
2e4: 1b 81 ldd r17, Y+3 ; 0x03
2e6: 0c 81 ldd r16, Y+4 ; 0x04
2e8: fd 80 ldd r15, Y+5 ; 0x05
2ea: ee 80 ldd r14, Y+6 ; 0x06
2ec: 17 d2 rcall .+1070 ; 0x71c <UIMgr_writeTxFifo>
2ee: 81 2f mov r24, r17
2f0: 15 d2 rcall .+1066 ; 0x71c <UIMgr_writeTxFifo>
2f2: 80 2f mov r24, r16
2f4: 13 d2 rcall .+1062 ; 0x71c <UIMgr_writeTxFifo>
2f6: 8f 2d mov r24, r15
2f8: 11 d2 rcall .+1058 ; 0x71c <UIMgr_writeTxFifo>
2fa: 8e 2d mov r24, r14
2fc: 0f d2 rcall .+1054 ; 0x71c <UIMgr_writeTxFifo>
2fe: d3 94 inc r13
300: 88 e0 ldi r24, 0x08 ; 8
302: d8 16 cp r13, r24
304: 11 f0 breq .+4 ; 0x30a <FrameMgr_processFrame+0x9a>
306: 28 96 adiw r28, 0x08 ; 8
308: ca cf rjmp .-108 ; 0x29e <FrameMgr_processFrame+0x2e>
30a: 8f ef ldi r24, 0xFF ; 255
30c: 07 d2 rcall .+1038 ; 0x71c <UIMgr_writeTxFifo>
30e: 84 e0 ldi r24, 0x04 ; 4
310: 38 df rcall .-400 ; 0x182 <Exec_writeEventFifo>
312: df 91 pop r29
314: cf 91 pop r28
316: 1f 91 pop r17
318: 0f 91 pop r16
31a: ff 90 pop r15
31c: ef 90 pop r14
31e: df 90 pop r13
320: 08 95 ret
00000322 <FrameMgr_processLine>:
322: 2f 92 push r2
324: 3f 92 push r3
326: 4f 92 push r4
328: 5f 92 push r5
32a: 6f 92 push r6
32c: 7f 92 push r7
32e: 8f 92 push r8
330: 9f 92 push r9
332: bf 92 push r11
334: cf 92 push r12
336: df 92 push r13
338: ef 92 push r14
33a: ff 92 push r15
33c: 0f 93 push r16
33e: 1f 93 push r17
340: cf 93 push r28
342: df 93 push r29
344: cd b7 in r28, 0x3d ; 61
346: de b7 in r29, 0x3e ; 62
348: 21 97 sbiw r28, 0x01 ; 1
34a: 0f b6 in r0, 0x3f ; 63
34c: f8 94 cli
34e: de bf out 0x3e, r29 ; 62
350: 0f be out 0x3f, r0 ; 63
352: cd bf out 0x3d, r28 ; 61
354: 40 91 60 00 lds r20, 0x0060
358: 50 91 61 00 lds r21, 0x0061
35c: 80 91 74 00 lds r24, 0x0074
360: 82 30 cpi r24, 0x02 ; 2
362: 09 f0 breq .+2 ; 0x366 <FrameMgr_processLine+0x44>
364: 5b c0 rjmp .+182 ; 0x41c <FrameMgr_processLine+0xfa>
366: 8b e0 ldi r24, 0x0B ; 11
368: 02 d4 rcall .+2052 ; 0xb6e <UartInt_txByte>
36a: 80 91 75 00 lds r24, 0x0075
36e: ff d3 rcall .+2046 ; 0xb6e <UartInt_txByte>
370: 0c eb ldi r16, 0xBC ; 188
372: 11 e0 ldi r17, 0x01 ; 1
374: 0f 2e mov r0, r31
376: fc e0 ldi r31, 0x0C ; 12
378: ef 2e mov r14, r31
37a: f1 e0 ldi r31, 0x01 ; 1
37c: ff 2e mov r15, r31
37e: f0 2d mov r31, r0
380: 0f 2e mov r0, r31
382: fc e6 ldi r31, 0x6C ; 108
384: cf 2e mov r12, r31
386: f2 e0 ldi r31, 0x02 ; 2
388: df 2e mov r13, r31
38a: f0 2d mov r31, r0
38c: d8 01 movw r26, r16
38e: 8c 91 ld r24, X
390: 89 83 std Y+1, r24 ; 0x01
392: 89 81 ldd r24, Y+1 ; 0x01
394: 8f 70 andi r24, 0x0F ; 15
396: 89 83 std Y+1, r24 ; 0x01
398: 89 81 ldd r24, Y+1 ; 0x01
39a: 82 95 swap r24
39c: 80 7f andi r24, 0xF0 ; 240
39e: 89 83 std Y+1, r24 ; 0x01
3a0: 99 81 ldd r25, Y+1 ; 0x01
3a2: f7 01 movw r30, r14
3a4: 80 81 ld r24, Z
3a6: 8f 70 andi r24, 0x0F ; 15
3a8: 89 2b or r24, r25
3aa: 89 83 std Y+1, r24 ; 0x01
3ac: 89 81 ldd r24, Y+1 ; 0x01
3ae: df d3 rcall .+1982 ; 0xb6e <UartInt_txByte>
3b0: f7 01 movw r30, r14
3b2: 81 81 ldd r24, Z+1 ; 0x01
3b4: 89 83 std Y+1, r24 ; 0x01
3b6: 89 81 ldd r24, Y+1 ; 0x01
3b8: 8f 70 andi r24, 0x0F ; 15
3ba: 89 83 std Y+1, r24 ; 0x01
3bc: 89 81 ldd r24, Y+1 ; 0x01
3be: 82 95 swap r24
3c0: 80 7f andi r24, 0xF0 ; 240
3c2: 89 83 std Y+1, r24 ; 0x01
3c4: 99 81 ldd r25, Y+1 ; 0x01
3c6: f8 01 movw r30, r16
3c8: 81 81 ldd r24, Z+1 ; 0x01
3ca: 8f 70 andi r24, 0x0F ; 15
3cc: 89 2b or r24, r25
3ce: 89 83 std Y+1, r24 ; 0x01
3d0: 89 81 ldd r24, Y+1 ; 0x01
3d2: cd d3 rcall .+1946 ; 0xb6e <UartInt_txByte>
3d4: 0e 5f subi r16, 0xFE ; 254
3d6: 1f 4f sbci r17, 0xFF ; 255
3d8: 82 e0 ldi r24, 0x02 ; 2
3da: 90 e0 ldi r25, 0x00 ; 0
3dc: e8 0e add r14, r24
3de: f9 1e adc r15, r25
3e0: 0c 15 cp r16, r12
3e2: 1d 05 cpc r17, r13
3e4: 99 f6 brne .-90 ; 0x38c <FrameMgr_processLine+0x6a>
3e6: 8f e0 ldi r24, 0x0F ; 15
3e8: c2 d3 rcall .+1924 ; 0xb6e <UartInt_txByte>
3ea: 80 91 75 00 lds r24, 0x0075
3ee: 8f 5f subi r24, 0xFF ; 255
3f0: 80 93 75 00 sts 0x0075, r24
3f4: 88 34 cpi r24, 0x48 ; 72
3f6: 60 f0 brcs .+24 ; 0x410 <FrameMgr_processLine+0xee>
3f8: 10 92 75 00 sts 0x0075, r1
3fc: 10 92 74 00 sts 0x0074, r1
400: 89 b7 in r24, 0x39 ; 57
402: 8b 7f andi r24, 0xFB ; 251
404: 89 bf out 0x39, r24 ; 57
406: 60 e0 ldi r22, 0x00 ; 0
408: 81 e1 ldi r24, 0x11 ; 17
40a: f3 d4 rcall .+2534 ; 0xdf2 <CamConfig_setCamReg>
40c: f7 d4 rcall .+2542 ; 0xdfc <CamConfig_sendFifoCmds>
40e: bf c0 rjmp .+382 ; 0x58e <__stack+0x12f>
410: 80 91 72 00 lds r24, 0x0072
414: 82 60 ori r24, 0x02 ; 2
416: 80 93 72 00 sts 0x0072, r24
41a: b9 c0 rjmp .+370 ; 0x58e <__stack+0x12f>
41c: 81 30 cpi r24, 0x01 ; 1
41e: 09 f0 breq .+2 ; 0x422 <FrameMgr_processLine+0x100>
420: b6 c0 rjmp .+364 ; 0x58e <__stack+0x12f>
422: b0 90 76 00 lds r11, 0x0076
426: eb 2c mov r14, r11
428: ff 24 eor r15, r15
42a: 37 01 movw r6, r14
42c: 08 94 sec
42e: 61 08 sbc r6, r1
430: 71 08 sbc r7, r1
432: 00 91 73 00 lds r16, 0x0073
436: 10 e0 ldi r17, 0x00 ; 0
438: 60 e0 ldi r22, 0x00 ; 0
43a: 71 e0 ldi r23, 0x01 ; 1
43c: 0f 2e mov r0, r31
43e: fc eb ldi r31, 0xBC ; 188
440: 2f 2e mov r2, r31
442: f1 e0 ldi r31, 0x01 ; 1
444: 3f 2e mov r3, r31
446: f0 2d mov r31, r0
448: d1 01 movw r26, r2
44a: 3c 91 ld r19, X
44c: 17 0f add r17, r23
44e: f1 01 movw r30, r2
450: 71 81 ldd r23, Z+1 ; 0x01
452: 82 e0 ldi r24, 0x02 ; 2
454: 90 e0 ldi r25, 0x00 ; 0
456: 28 0e add r2, r24
458: 39 1e adc r3, r25
45a: 67 0f add r22, r23
45c: 33 23 and r19, r19
45e: 09 f4 brne .+2 ; 0x462 <__stack+0x3>
460: 57 c0 rjmp .+174 ; 0x510 <__stack+0xb1>
462: 74 30 cpi r23, 0x04 ; 4
464: 08 f4 brcc .+2 ; 0x468 <__stack+0x9>
466: 54 c0 rjmp .+168 ; 0x510 <__stack+0xb1>
468: fa 01 movw r30, r20
46a: 20 e0 ldi r18, 0x00 ; 0
46c: 80 81 ld r24, Z
46e: 83 17 cp r24, r19
470: b1 f5 brne .+108 ; 0x4de <__stack+0x7f>
472: 87 81 ldd r24, Z+7 ; 0x07
474: 81 30 cpi r24, 0x01 ; 1
476: 99 f5 brne .+102 ; 0x4de <__stack+0x7f>
478: 0f 2e mov r0, r31
47a: f6 e0 ldi r31, 0x06 ; 6
47c: cf 2e mov r12, r31
47e: dd 24 eor r13, r13
480: f0 2d mov r31, r0
482: ce 0e add r12, r30
484: df 1e adc r13, r31
486: 86 81 ldd r24, Z+6 ; 0x06
488: 99 27 eor r25, r25
48a: 86 15 cp r24, r6
48c: 97 05 cpc r25, r7
48e: 39 f5 brne .+78 ; 0x4de <__stack+0x7f>
490: 2f 01 movw r4, r30
492: 08 94 sec
494: 41 1c adc r4, r1
496: 51 1c adc r5, r1
498: 81 81 ldd r24, Z+1 ; 0x01
49a: 88 24 eor r8, r8
49c: 99 24 eor r9, r9
49e: 68 94 set
4a0: 81 f8 bld r8, 1
4a2: 8e 0e add r8, r30
4a4: 9f 1e adc r9, r31
4a6: 92 81 ldd r25, Z+2 ; 0x02
4a8: 18 17 cp r17, r24
4aa: 10 f0 brcs .+4 ; 0x4b0 <__stack+0x51>
4ac: 91 17 cp r25, r17
4ae: 40 f4 brcc .+16 ; 0x4c0 <__stack+0x61>
4b0: 68 17 cp r22, r24
4b2: 10 f0 brcs .+4 ; 0x4b8 <__stack+0x59>
4b4: 96 17 cp r25, r22
4b6: 20 f4 brcc .+8 ; 0x4c0 <__stack+0x61>
4b8: 81 17 cp r24, r17
4ba: 88 f0 brcs .+34 ; 0x4de <__stack+0x7f>
4bc: 69 17 cp r22, r25
4be: 78 f0 brcs .+30 ; 0x4de <__stack+0x7f>
4c0: d2 01 movw r26, r4
4c2: 1c 93 st X, r17
4c4: d4 01 movw r26, r8
4c6: 6c 93 st X, r22
4c8: 83 81 ldd r24, Z+3 ; 0x03
4ca: 18 17 cp r17, r24
4cc: 08 f4 brcc .+2 ; 0x4d0 <__stack+0x71>
4ce: 13 83 std Z+3, r17 ; 0x03
4d0: 85 81 ldd r24, Z+5 ; 0x05
4d2: 86 17 cp r24, r22
4d4: 08 f4 brcc .+2 ; 0x4d8 <__stack+0x79>
4d6: 65 83 std Z+5, r22 ; 0x05
4d8: f6 01 movw r30, r12
4da: b0 82 st Z, r11
4dc: 19 c0 rjmp .+50 ; 0x510 <__stack+0xb1>
4de: 2f 5f subi r18, 0xFF ; 255
4e0: 28 30 cpi r18, 0x08 ; 8
4e2: 09 f4 brne .+2 ; 0x4e6 <__stack+0x87>
4e4: 50 c0 rjmp .+160 ; 0x586 <__stack+0x127>
4e6: 38 96 adiw r30, 0x08 ; 8
4e8: c1 cf rjmp .-126 ; 0x46c <__stack+0xd>
4ea: fa 01 movw r30, r20
4ec: 90 e0 ldi r25, 0x00 ; 0
4ee: 87 81 ldd r24, Z+7 ; 0x07
4f0: 88 23 and r24, r24
4f2: 21 f0 breq .+8 ; 0x4fc <__stack+0x9d>
4f4: 38 96 adiw r30, 0x08 ; 8
4f6: 9f 5f subi r25, 0xFF ; 255
4f8: 98 30 cpi r25, 0x08 ; 8
4fa: c9 f7 brne .-14 ; 0x4ee <__stack+0x8f>
4fc: 30 83 st Z, r19
4fe: 11 83 std Z+1, r17 ; 0x01
500: 62 83 std Z+2, r22 ; 0x02
502: 13 83 std Z+3, r17 ; 0x03
504: b4 82 std Z+4, r11 ; 0x04
506: 65 83 std Z+5, r22 ; 0x05
508: b6 82 std Z+6, r11 ; 0x06
50a: 81 e0 ldi r24, 0x01 ; 1
50c: 87 83 std Z+7, r24 ; 0x07
50e: 0f 5f subi r16, 0xFF ; 255
510: 60 3b cpi r22, 0xB0 ; 176
512: 08 f4 brcc .+2 ; 0x516 <__stack+0xb7>
514: 99 cf rjmp .-206 ; 0x448 <FrameMgr_processLine+0x126>
516: 00 93 73 00 sts 0x0073, r16
51a: c7 01 movw r24, r14
51c: 87 70 andi r24, 0x07 ; 7
51e: 90 70 andi r25, 0x00 ; 0
520: 07 97 sbiw r24, 0x07 ; 7
522: e9 f4 brne .+58 ; 0x55e <__stack+0xff>
524: 60 e0 ldi r22, 0x00 ; 0
526: fa 01 movw r30, r20
528: 87 81 ldd r24, Z+7 ; 0x07
52a: 81 30 cpi r24, 0x01 ; 1
52c: 81 f4 brne .+32 ; 0x54e <__stack+0xef>
52e: 86 81 ldd r24, Z+6 ; 0x06
530: 28 2f mov r18, r24
532: 33 27 eor r19, r19
534: 84 81 ldd r24, Z+4 ; 0x04
536: d9 01 movw r26, r18
538: a8 1b sub r26, r24
53a: b1 09 sbc r27, r1
53c: 13 97 sbiw r26, 0x03 ; 3
53e: 3c f4 brge .+14 ; 0x54e <__stack+0xef>
540: c7 01 movw r24, r14
542: 82 1b sub r24, r18
544: 93 0b sbc r25, r19
546: 03 97 sbiw r24, 0x03 ; 3
548: 14 f0 brlt .+4 ; 0x54e <__stack+0xef>
54a: 17 82 std Z+7, r1 ; 0x07
54c: 01 50 subi r16, 0x01 ; 1
54e: 6f 5f subi r22, 0xFF ; 255
550: 68 30 cpi r22, 0x08 ; 8
552: 19 f0 breq .+6 ; 0x55a <__stack+0xfb>
554: 48 5f subi r20, 0xF8 ; 248
556: 5f 4f sbci r21, 0xFF ; 255
558: e6 cf rjmp .-52 ; 0x526 <__stack+0xc7>
55a: 00 93 73 00 sts 0x0073, r16
55e: 8b 2d mov r24, r11
560: 8f 5f subi r24, 0xFF ; 255
562: 80 93 76 00 sts 0x0076, r24
566: 80 39 cpi r24, 0x90 ; 144
568: 41 f4 brne .+16 ; 0x57a <__stack+0x11b>
56a: 80 e2 ldi r24, 0x20 ; 32
56c: 0a de rcall .-1004 ; 0x182 <Exec_writeEventFifo>
56e: 89 b7 in r24, 0x39 ; 57
570: 8b 7f andi r24, 0xFB ; 251
572: 89 bf out 0x39, r24 ; 57
574: 10 92 76 00 sts 0x0076, r1
578: 0a c0 rjmp .+20 ; 0x58e <__stack+0x12f>
57a: 80 91 72 00 lds r24, 0x0072
57e: 82 60 ori r24, 0x02 ; 2
580: 80 93 72 00 sts 0x0072, r24
584: 04 c0 rjmp .+8 ; 0x58e <__stack+0x12f>
586: 08 30 cpi r16, 0x08 ; 8
588: 08 f4 brcc .+2 ; 0x58c <__stack+0x12d>
58a: af cf rjmp .-162 ; 0x4ea <__stack+0x8b>
58c: c1 cf rjmp .-126 ; 0x510 <__stack+0xb1>
58e: 21 96 adiw r28, 0x01 ; 1
590: 0f b6 in r0, 0x3f ; 63
592: f8 94 cli
594: de bf out 0x3e, r29 ; 62
596: 0f be out 0x3f, r0 ; 63
598: cd bf out 0x3d, r28 ; 61
59a: df 91 pop r29
59c: cf 91 pop r28
59e: 1f 91 pop r17
5a0: 0f 91 pop r16
5a2: ff 90 pop r15
5a4: ef 90 pop r14
5a6: df 90 pop r13
5a8: cf 90 pop r12
5aa: bf 90 pop r11
5ac: 9f 90 pop r9
5ae: 8f 90 pop r8
5b0: 7f 90 pop r7
5b2: 6f 90 pop r6
5b4: 5f 90 pop r5
5b6: 4f 90 pop r4
5b8: 3f 90 pop r3
5ba: 2f 90 pop r2
5bc: 08 95 ret
000005be <FrameMgr_init>:
5be: 80 e4 ldi r24, 0x40 ; 64
5c0: e8 e7 ldi r30, 0x78 ; 120
5c2: f0 e0 ldi r31, 0x00 ; 0
5c4: 11 92 st Z+, r1
5c6: 8a 95 dec r24
5c8: e9 f7 brne .-6 ; 0x5c4 <FrameMgr_init+0x6>
5ca: 08 95 ret
000005cc <FrameMgr_acquireLine>:
5cc: 80 91 74 00 lds r24, 0x0074
5d0: 82 30 cpi r24, 0x02 ; 2
5d2: 31 f5 brne .+76 ; 0x620 <FrameMgr_acquireLine+0x54>
5d4: 80 91 75 00 lds r24, 0x0075
5d8: 98 2f mov r25, r24
5da: 99 0f add r25, r25
5dc: 80 eb ldi r24, 0xB0 ; 176
5de: ec eb ldi r30, 0xBC ; 188
5e0: f1 e0 ldi r31, 0x01 ; 1
5e2: 28 2f mov r18, r24
5e4: 11 92 st Z+, r1
5e6: 2a 95 dec r18
5e8: e9 f7 brne .-6 ; 0x5e4 <FrameMgr_acquireLine+0x18>
5ea: ec e0 ldi r30, 0x0C ; 12
5ec: f1 e0 ldi r31, 0x01 ; 1
5ee: 11 92 st Z+, r1
5f0: 8a 95 dec r24
5f2: e9 f7 brne .-6 ; 0x5ee <FrameMgr_acquireLine+0x22>
5f4: 82 9b sbis 0x10, 2 ; 16
5f6: fe cf rjmp .-4 ; 0x5f4 <FrameMgr_acquireLine+0x28>
5f8: 82 9b sbis 0x10, 2 ; 16
5fa: 07 c0 rjmp .+14 ; 0x60a <FrameMgr_acquireLine+0x3e>
5fc: fd cf rjmp .-6 ; 0x5f8 <FrameMgr_acquireLine+0x2c>
5fe: 84 9b sbis 0x10, 4 ; 16
600: fe cf rjmp .-4 ; 0x5fe <FrameMgr_acquireLine+0x32>
602: 91 50 subi r25, 0x01 ; 1
604: 84 9b sbis 0x10, 4 ; 16
606: 04 c0 rjmp .+8 ; 0x610 <FrameMgr_acquireLine+0x44>
608: fd cf rjmp .-6 ; 0x604 <FrameMgr_acquireLine+0x38>
60a: 99 23 and r25, r25
60c: c1 f7 brne .-16 ; 0x5fe <FrameMgr_acquireLine+0x32>
60e: 02 c0 rjmp .+4 ; 0x614 <FrameMgr_acquireLine+0x48>
610: 99 23 and r25, r25
612: a9 f7 brne .-22 ; 0x5fe <FrameMgr_acquireLine+0x32>
614: 6c e0 ldi r22, 0x0C ; 12
616: 71 e0 ldi r23, 0x01 ; 1
618: 8c eb ldi r24, 0xBC ; 188
61a: 91 e0 ldi r25, 0x01 ; 1
61c: e4 d4 rcall .+2504 ; 0xfe6 <CamIntAsm_acquireDumpLine>
61e: 08 95 ret
620: 81 30 cpi r24, 0x01 ; 1
622: 39 f4 brne .+14 ; 0x632 <FrameMgr_acquireLine+0x66>
624: 84 99 sbic 0x10, 4 ; 16
626: fe cf rjmp .-4 ; 0x624 <FrameMgr_acquireLine+0x58>
628: 60 e0 ldi r22, 0x00 ; 0
62a: 73 e0 ldi r23, 0x03 ; 3
62c: 8c eb ldi r24, 0xBC ; 188
62e: 91 e0 ldi r25, 0x01 ; 1
630: 93 d4 rcall .+2342 ; 0xf58 <CamIntAsm_acquireTrackingLine>
632: 08 95 ret
00000634 <FrameMgr_acquireFrame>:
634: 80 91 74 00 lds r24, 0x0074
638: 81 30 cpi r24, 0x01 ; 1
63a: a9 f4 brne .+42 ; 0x666 <FrameMgr_acquireFrame+0x32>
63c: 10 92 76 00 sts 0x0076, r1
640: 80 91 73 00 lds r24, 0x0073
644: 80 93 77 00 sts 0x0077, r24
648: 10 92 73 00 sts 0x0073, r1
64c: 80 e4 ldi r24, 0x40 ; 64
64e: e8 e7 ldi r30, 0x78 ; 120
650: f0 e0 ldi r31, 0x00 ; 0
652: 11 92 st Z+, r1
654: 8a 95 dec r24
656: e9 f7 brne .-6 ; 0x652 <FrameMgr_acquireFrame+0x1e>
658: 82 9b sbis 0x10, 2 ; 16
65a: fe cf rjmp .-4 ; 0x658 <FrameMgr_acquireFrame+0x24>
65c: 60 e0 ldi r22, 0x00 ; 0
65e: 73 e0 ldi r23, 0x03 ; 3
660: 8c eb ldi r24, 0xBC ; 188
662: 91 e0 ldi r25, 0x01 ; 1
664: 79 d4 rcall .+2290 ; 0xf58 <CamIntAsm_acquireTrackingLine>
666: 08 95 ret
00000668 <FrameMgr_dispatchEvent>:
668: 84 30 cpi r24, 0x04 ; 4
66a: 19 f1 breq .+70 ; 0x6b2 <FrameMgr_dispatchEvent+0x4a>
66c: 85 30 cpi r24, 0x05 ; 5
66e: 28 f4 brcc .+10 ; 0x67a <FrameMgr_dispatchEvent+0x12>
670: 81 30 cpi r24, 0x01 ; 1
672: 09 f1 breq .+66 ; 0x6b6 <FrameMgr_dispatchEvent+0x4e>
674: 82 30 cpi r24, 0x02 ; 2
676: 41 f5 brne .+80 ; 0x6c8 <FrameMgr_dispatchEvent+0x60>
678: 07 c0 rjmp .+14 ; 0x688 <FrameMgr_dispatchEvent+0x20>
67a: 80 38 cpi r24, 0x80 ; 128
67c: 99 f0 breq .+38 ; 0x6a4 <FrameMgr_dispatchEvent+0x3c>
67e: 81 38 cpi r24, 0x81 ; 129
680: 09 f1 breq .+66 ; 0x6c4 <FrameMgr_dispatchEvent+0x5c>
682: 80 32 cpi r24, 0x20 ; 32
684: 09 f5 brne .+66 ; 0x6c8 <FrameMgr_dispatchEvent+0x60>
686: 13 c0 rjmp .+38 ; 0x6ae <FrameMgr_dispatchEvent+0x46>
688: 61 e0 ldi r22, 0x01 ; 1
68a: 81 e1 ldi r24, 0x11 ; 17
68c: b2 d3 rcall .+1892 ; 0xdf2 <CamConfig_setCamReg>
68e: b6 d3 rcall .+1900 ; 0xdfc <CamConfig_sendFifoCmds>
690: 88 ee ldi r24, 0xE8 ; 232
692: 93 e0 ldi r25, 0x03 ; 3
694: 08 d4 rcall .+2064 ; 0xea6 <Utility_delay>
696: 10 92 75 00 sts 0x0075, r1
69a: 82 e0 ldi r24, 0x02 ; 2
69c: 80 93 74 00 sts 0x0074, r24
6a0: 95 df rcall .-214 ; 0x5cc <FrameMgr_acquireLine>
6a2: 08 95 ret
6a4: 81 e0 ldi r24, 0x01 ; 1
6a6: 80 93 74 00 sts 0x0074, r24
6aa: c4 df rcall .-120 ; 0x634 <FrameMgr_acquireFrame>
6ac: 08 95 ret
6ae: e0 dd rcall .-1088 ; 0x270 <FrameMgr_processFrame>
6b0: 08 95 ret
6b2: c0 df rcall .-128 ; 0x634 <FrameMgr_acquireFrame>
6b4: 08 95 ret
6b6: 80 91 74 00 lds r24, 0x0074
6ba: 88 23 and r24, r24
6bc: 29 f0 breq .+10 ; 0x6c8 <FrameMgr_dispatchEvent+0x60>
6be: 84 e0 ldi r24, 0x04 ; 4
6c0: 60 dd rcall .-1344 ; 0x182 <Exec_writeEventFifo>
6c2: 08 95 ret
6c4: 10 92 74 00 sts 0x0074, r1
6c8: 08 95 ret
000006ca <UIMgr_writeBufferToTxFifo>:
static unsigned char tokenCount = 0;
static unsigned char tokenBuffer[MAX_TOKEN_COUNT];
static UIMgr_Cmd_t receivedCmd = noCmd;
static unsigned char AVRcamVersion[] = "AVRcam v1.4\r";
/* Local Function Declaration */
static unsigned char UIMgr_readRxFifo(void);
static unsigned char UIMgr_readTxFifo(void);
static unsigned char UIMgr_readRxFifo(void);
static void UIMgr_sendNck(void);
static void UIMgr_sendAck(void);
static void UIMgr_convertTokenToCmd(void);
static void UIMgr_convertTokenToValue(void);
static void UIMgr_executeCmd(void);
/* Extern Variables */
unsigned char UIMgr_rxFifo[UI_MGR_RX_FIFO_SIZE];
unsigned char UIMgr_rxFifoHead=0;
unsigned char UIMgr_rxFifoTail=0;
unsigned char UIMgr_txFifo[UI_MGR_TX_FIFO_SIZE];
unsigned char UIMgr_txFifoHead=0;
unsigned char UIMgr_txFifoTail=0;
/* Definitions */
#define IS_DATA_IN_TX_FIFO() (!(UIMgr_txFifoHead == UIMgr_txFifoTail))
#define IS_DATA_IN_RX_FIFO() (!(UIMgr_rxFifoHead == UIMgr_rxFifoTail))
/* MAX_EEPROM_WRITE_ATTEMPTS limits the number of writes that can be
done to a particular EEPROM cell, so that it can't possible just
write to the same cell over and over */
#define MAX_EEPROM_WRITE_ATTEMPTS 3
/***********************************************************
Function Name: UIMgr_init
Function Description: This function is responsible for
initializing the UIMgr module. It sets up the fifo
used to hold incoming data, etc.
Inputs: none
Outputs: none
***********************************************************/
void UIMgr_init(void)
{
memset(asciiTokenBuffer,0x00,MAX_TOKEN_LENGTH+1);
memset(tokenBuffer,0x00,MAX_TOKEN_COUNT);
memset(UIMgr_txFifo,0x00,UI_MGR_TX_FIFO_SIZE);
memset(UIMgr_rxFifo,0x00,UI_MGR_RX_FIFO_SIZE);
}
/***********************************************************
Function Name: UIMgr_dispatchEvent
Function Description: This function is responsible for
processing events that pertain to the UIMgr.
Inputs: event - the generated event
Outputs: none
***********************************************************/
void UIMgr_dispatchEvent(unsigned char event)
{
switch(event)
{
case EV_ACQUIRE_LINE_COMPLETE:
UIMgr_transmitPendingData();
break;
case EV_SERIAL_DATA_RECEIVED:
UIMgr_processReceivedData();
break;
case EV_SERIAL_DATA_PENDING_TX:
UIMgr_flushTxBuffer();
break;
}
}
/***********************************************************
Function Name: UIMgr_transmitPendingData
Function Description: This function is responsible for
transmitting a single byte of data if data is waiting
to be sent. Otherwise, if nothing is waiting, the
function just returns.
Inputs: none
Outputs: none
***********************************************************/
void UIMgr_transmitPendingData(void)
{
if (IS_DATA_IN_TX_FIFO() == TRUE)
{
/* data is waiting...send a single byte */
UartInt_txByte( UIMgr_readTxFifo() );
}
}
/***********************************************************
Function Name: UIMgr_processReceivedData
Function Description: This function is responsible for
parsing any serial data waiting in the rx fifo
Inputs: none
Outputs: none
***********************************************************/
void UIMgr_processReceivedData(void)
{
unsigned char tmpData = 0;
/* still need to add a mechanism to handle token counts
that are excessive!!! FIX ME!!! */
while(IS_DATA_IN_RX_FIFO() == TRUE)
{
tmpData = UIMgr_readRxFifo();
if (tmpData == '\r')
{
/* we have reached a token separator */
if (tokenCount == 0)
{
/* convert the command */
UIMgr_convertTokenToCmd();
}
else
{
/* convert a value */
UIMgr_convertTokenToValue();
tokenCount++;
}
/* either way, it is time to try to process the received
token list since we have reached the end of the cmd. */
Utility_delay(100);
if (receivedCmd == invalidCmd ||
receivedCmd == noCmd )
{
UIMgr_sendNck();
PUBLISH_EVENT(EV_SERIAL_DATA_PENDING_TX);
}
else
{
UIMgr_sendAck();
/* publish the serial data pending event, so it
will push the ACK out before we execute the cmd */
PUBLISH_EVENT(EV_SERIAL_DATA_PENDING_TX);
UIMgr_executeCmd();
}
/* reset any necessary data */
tokenCount = 0;
memset(tokenBuffer,0x00,MAX_TOKEN_COUNT);
}
else if (tmpData == ' ') /* space char */
{
/* the end of a token has been reached */
if (tokenCount == 0)
{
UIMgr_convertTokenToCmd();
tokenCount++; /* check this...why is this being incremented here??? This
means we have received a token, with tokenCount == 0, which means it is a
command...why is this contributing to tokenCount?
This might cause the set color map command to include too much data, since
it sets the color map based on tokenCount...CHECK*/
}
else
{
/* check to see if this token is going to push
us over the limit...if so, abort the transaction */
if (tokenCount+1 >= MAX_TOKEN_COUNT)
{
/* we received too many tokens, and
need to NCK this request, since its too
large...reset everything...*/
charCount=0;
charIndex=0;
tokenCount=0;
receivedCmd = invalidCmd;
}
else
{
/* tokenCount is still in range...*/
UIMgr_convertTokenToValue();
tokenCount++;
}
}
}
else if ( (tmpData >= 'A' && tmpData <= 'Z') ||
(tmpData >= '0' && tmpData <= '9') )
{
/* a valid range of token was received */
asciiTokenBuffer[charIndex] = tmpData;
charCount++;
charIndex++;
if (charCount > MAX_TOKEN_LENGTH)
{
/* we have received a token that cannot be handled...
set the received cmd to an invalid cmd, and wait
for the \r to process it */
receivedCmd = invalidCmd;
charIndex = 0; /* ...so we won't overwrite memory */
}
}
else
{
/* an invalid character was received */
receivedCmd = invalidCmd;
}
} /* end while */
asm volatile("clt"::); /* clear out the T flag in case it wasn't
cleared already */
}
/***********************************************************
Function Name: UIMgr_executeCmd
Function Description: This function is responsible for
executing whatever cmd is stored in the receivedCmd
object.
Inputs: none
Outputs: none
***********************************************************/
static void UIMgr_executeCmd(void)
{
unsigned char i,eepromData, num_writes=0;
unsigned char *pData;
unsigned char eeprom_write_succeeded = FALSE;
#if DEBUG_COLOR_MAP
unsigned char asciiBuffer[5];
#endif
if (receivedCmd == pingCmd)
{
}
else if (receivedCmd == getVersionCmd)
{
pData = AVRcamVersion;
while(*pData != 0)
{
UIMgr_writeTxFifo(*pData++);
}
}
else if (receivedCmd == resetCameraCmd)
{
CamInt_resetCam();
}
else if (receivedCmd == dumpFrameCmd)
{
/* publish the event that will indicate that
a request has come to dump a frame...this will
be received by the FrameMgr, which will begin
dumping the frame...a short delay is needed
here to keep the Java demo app happy (sometimes
it wouldn't be able to receive the serial data
as quickly as AVRcam can provide it). */
Utility_delay(100);
PUBLISH_EVENT(EV_DUMP_FRAME);
}
else if (receivedCmd == setCameraRegsCmd)
{
/* we need to gather the tokens and
build config cmds to be sent to the camera */
for (i=1; i<tokenCount; i+=2) /* starts at 1 since first token
is the CR cmd */
{
CamConfig_setCamReg(tokenBuffer[i],tokenBuffer[i+1]);
}
CamConfig_sendFifoCmds();
}
else if (receivedCmd == enableTrackingCmd)
{
/* publish the event...again with a short delay */
Utility_delay(100);
PUBLISH_EVENT(EV_ENABLE_TRACKING);
}
else if (receivedCmd == disableTrackingCmd)
{
PUBLISH_EVENT(EV_DISABLE_TRACKING);
}
else if (receivedCmd == setColorMapCmd)
{
/* copy the received tokens into the color map */
for (i=0; i<tokenCount; i++)
{
colorMap[i] = tokenBuffer[i+1];
/* write each colorMap byte to EEPROM, but only those
that changed...this will help reduce wear on the EEPROM */
eepromData = eeprom_read_byte( (unsigned char*)(i+1));
if (eepromData != colorMap[i])
{
/* need to actually perform the write because the
data in eeprom is different than the current colorMap */
eeprom_write_succeeded = FALSE;
while(eeprom_write_succeeded == FALSE && num_writes < MAX_EEPROM_WRITE_ATTEMPTS)
{
eeprom_write_byte((unsigned char*)(i+1),colorMap[i]);
num_writes++;
eepromData = eeprom_read_byte( (unsigned char*)(i+1));
if (eepromData == colorMap[i])
{
eeprom_write_succeeded = TRUE;
}
}
num_writes = 0;
}
}
#if DEBUG_COLOR_MAP
/* for debugging...send out the entire color map */
UIMgr_txBuffer("\r\n",2);
for (i=0; i<NUM_ELEMENTS_IN_COLOR_MAP; i++)
{
memset(asciiBuffer,0x00,5);
itoa(colorMap[i],asciiBuffer,10);
UIMgr_txBuffer(asciiBuffer,3);
UIMgr_txBuffer(" ",1);
if (i==15 || i == 31)
{
/* break up the output */
UIMgr_txBuffer("\r\n",2);
}
}
#endif
}
}
/***********************************************************
Function Name: UIMgr_convertTokenToValue
Function Description: This function is responsible for
converting a received token to a hex value It will
access the asciiTokenBuffer directly, and store the
result in the appropriate token buffer.
Inputs: none
Outputs: none
***********************************************************/
static void UIMgr_convertTokenToValue(void)
{
unsigned int newValue;
newValue = atoi(asciiTokenBuffer);
if (newValue > 255)
{
/* the value is too large */
receivedCmd = invalidCmd;
tokenBuffer[tokenCount] = 0xFF; /* to indicate an error */
}
else
{
/* copy the value into the tokenBuffer */
tokenBuffer[tokenCount] = newValue;
}
memset(asciiTokenBuffer,0x00,MAX_TOKEN_LENGTH);
charIndex = 0;
charCount = 0;
}
/***********************************************************
Function Name: UIMgr_convertTokenToCmd
Function Description: This function is responsible for
parsing a received 2-character command. It will
access the asciiTokenBuffer directly.
Inputs: none
Outputs: none
***********************************************************/
static void UIMgr_convertTokenToCmd(void)
{
if ( (asciiTokenBuffer[0] == 'P') &&
(asciiTokenBuffer[1] == 'G') )
{
/* we got a "ping" command...but we still need to see
if we are going to get the \r */
receivedCmd = pingCmd;
}
else if ( (asciiTokenBuffer[0] == 'G') &&
(asciiTokenBuffer[1] == 'V') )
{
/* we got the "get version" command */
receivedCmd = getVersionCmd;
}
else if ( (asciiTokenBuffer[0] == 'D') &&
(asciiTokenBuffer[1] == 'F') )
{
/* we should go into frame dump mode */
receivedCmd = dumpFrameCmd;
}
else if ( (asciiTokenBuffer[0] == 'C') &&
(asciiTokenBuffer[1] == 'R') )
{
/* the user wants to set registers in the OV6620 */
receivedCmd = setCameraRegsCmd;
}
else if ( (asciiTokenBuffer[0] == 'E') &&
(asciiTokenBuffer[1] == 'T') )
{
/* the user wants to enable tracking */
receivedCmd = enableTrackingCmd;
}
else if ( (asciiTokenBuffer[0] == 'S') &&
(asciiTokenBuffer[1] == 'M') )
{
/* the user wants to set the color map */
receivedCmd = setColorMapCmd;
}
else if ( (asciiTokenBuffer[0] == 'D') &&
(asciiTokenBuffer[1] == 'T') )
{
receivedCmd = disableTrackingCmd;
}
else if ( (asciiTokenBuffer[0] == 'R') &&
(asciiTokenBuffer[1] == 'S') )
{
receivedCmd = resetCameraCmd;
}
else
{
/* don't recognize the cmd */
receivedCmd = invalidCmd;
}
memset(asciiTokenBuffer,0x00,MAX_TOKEN_LENGTH);
charIndex = 0;
charCount = 0;
}
/***********************************************************
Function Name: UIMgr_sendAck
Function Description: This function is responsible for
queuing up an ACK to be sent to the user.
Inputs: none
Outputs: none
***********************************************************/
static void UIMgr_sendAck(void)
{
UIMgr_writeTxFifo('A');
UIMgr_writeTxFifo('C');
UIMgr_writeTxFifo('K');
UIMgr_writeTxFifo('\r');
}
/***********************************************************
Function Name: UIMgr_sendNck
Function Description: This function is responsible for
queueing up an NCK to be sent to the user.
Inputs: none
Outputs: none
***********************************************************/
static void UIMgr_sendNck(void)
{
UIMgr_writeTxFifo('N');
UIMgr_writeTxFifo('C');
UIMgr_writeTxFifo('K');
UIMgr_writeTxFifo('\r');
}
/***********************************************************
Function Name: UIMgr_writeBufferToTxFifo
Function Description: This function is responsible for
placing "length" bytes into the tx FIFO.
Inputs: pData - a pointer to the data to send
length - the number of bytes to send
Outputs: none
***********************************************************/
void UIMgr_writeBufferToTxFifo(unsigned char *pData, unsigned char length)
{
6ca: dc 01 movw r26, r24
unsigned char tmpHead;
if (length == 0)
6cc: 66 23 and r22, r22
6ce: b1 f0 breq .+44 ; 0x6fc <UIMgr_writeBufferToTxFifo+0x32>
{
return;
}
DISABLE_INTS();
6d0: f8 94 cli
while(length-- != 0)
6d2: 61 50 subi r22, 0x01 ; 1
6d4: 6f 3f cpi r22, 0xFF ; 255
6d6: 89 f0 breq .+34 ; 0x6fa <UIMgr_writeBufferToTxFifo+0x30>
6d8: 90 91 ba 00 lds r25, 0x00BA
{
UIMgr_txFifo[UIMgr_txFifoHead] = *pData++;
6dc: 24 e9 ldi r18, 0x94 ; 148
6de: 32 e0 ldi r19, 0x02 ; 2
6e0: f9 01 movw r30, r18
6e2: e9 0f add r30, r25
6e4: f1 1d adc r31, r1
6e6: 8d 91 ld r24, X+
6e8: 80 83 st Z, r24
/* now move the head up */
tmpHead = (UIMgr_txFifoHead + 1) & (UI_MGR_TX_FIFO_MASK);
6ea: 89 2f mov r24, r25
6ec: 8f 5f subi r24, 0xFF ; 255
6ee: 98 2f mov r25, r24
6f0: 9f 73 andi r25, 0x3F ; 63
6f2: 61 50 subi r22, 0x01 ; 1
6f4: a8 f7 brcc .-22 ; 0x6e0 <UIMgr_writeBufferToTxFifo+0x16>
6f6: 90 93 ba 00 sts 0x00BA, r25
UIMgr_txFifoHead = tmpHead;
}
ENABLE_INTS();
6fa: 78 94 sei
6fc: 08 95 ret
000006fe <UIMgr_readTxFifo>:
}
/***********************************************************
Function Name: UIMgr_txBuffer
Function Description: This function is responsible for
sending 'length' bytes out using the UartInterface
module.
Inputs: pData - a pointer to the data to send
length - the number of bytes to send
Outputs: none
***********************************************************/
void UIMgr_txBuffer(unsigned char *pData, unsigned char length)
{
while(length-- != 0)
{
UartInt_txByte(*pData++);
}
}
/***********************************************************
Function Name: UIMgr_flushTxBuffer
Function Description: This function is responsible for
sending all data currently in the serial tx buffer
to the user.
Inputs: none
Outputs: none
***********************************************************/
void UIMgr_flushTxBuffer(void)
{
while(IS_DATA_IN_TX_FIFO() == TRUE)
{
UartInt_txByte(UIMgr_readTxFifo() );
}
}
/***********************************************************
Function Name: UIMgr_readRxFifo
Function Description: This function is responsible for
reading a single byte of data from the rx fifo, and
updating the appropriate pointers.
Inputs: none
Outputs: unsigned char-the data read
***********************************************************/
static unsigned char UIMgr_readRxFifo(void)
{
unsigned char dataByte, tmpTail;
/* just return the current tail from the rx fifo */
DISABLE_INTS();
dataByte = UIMgr_rxFifo[UIMgr_rxFifoTail];
tmpTail = (UIMgr_rxFifoTail+1) & (UI_MGR_RX_FIFO_MASK);
UIMgr_rxFifoTail = tmpTail;
ENABLE_INTS();
return(dataByte);
}
/***********************************************************
Function Name: UIMgr_readTxFifo
Function Description: This function is responsible for
reading a single byte of data from the tx fifo, and
updating the appropriate pointers.
Inputs: none
Outputs: unsigned char-the data read
***********************************************************/
static unsigned char UIMgr_readTxFifo(void)
{
unsigned char dataByte, tmpTail;
/* just return the current tail from the tx fifo */
DISABLE_INTS();
6fe: f8 94 cli
dataByte = UIMgr_txFifo[UIMgr_txFifoTail];
700: 90 91 bb 00 lds r25, 0x00BB
704: e4 e9 ldi r30, 0x94 ; 148
706: f2 e0 ldi r31, 0x02 ; 2
708: e9 0f add r30, r25
70a: f1 1d adc r31, r1
70c: 80 81 ld r24, Z
tmpTail = (UIMgr_txFifoTail+1) & (UI_MGR_TX_FIFO_MASK);
UIMgr_txFifoTail = tmpTail;
70e: 9f 5f subi r25, 0xFF ; 255
710: 9f 73 andi r25, 0x3F ; 63
712: 90 93 bb 00 sts 0x00BB, r25
ENABLE_INTS();
716: 78 94 sei
return(dataByte);
}
718: 99 27 eor r25, r25
71a: 08 95 ret
0000071c <UIMgr_writeTxFifo>:
/***********************************************************
Function Name: UIMgr_writeTxFifo
Function Description: This function is responsible for
writing a single byte to the TxFifo and
updating the appropriate pointers.
Inputs: data - the byte to write to the Fifo
Outputs: none
***********************************************************/
void UIMgr_writeTxFifo(unsigned char data)
{
unsigned char tmpHead;
DISABLE_INTS();
71c: f8 94 cli
UIMgr_txFifo[UIMgr_txFifoHead] = data;
71e: 90 91 ba 00 lds r25, 0x00BA
722: e4 e9 ldi r30, 0x94 ; 148
724: f2 e0 ldi r31, 0x02 ; 2
726: e9 0f add r30, r25
728: f1 1d adc r31, r1
72a: 80 83 st Z, r24
/* now move the head up */
tmpHead = (UIMgr_txFifoHead + 1) & (UI_MGR_TX_FIFO_MASK);
UIMgr_txFifoHead = tmpHead;
72c: 9f 5f subi r25, 0xFF ; 255
72e: 9f 73 andi r25, 0x3F ; 63
730: 90 93 ba 00 sts 0x00BA, r25
ENABLE_INTS();
734: 78 94 sei
736: 08 95 ret
00000738 <UIMgr_flushTxBuffer>:
738: 90 91 ba 00 lds r25, 0x00BA
73c: 80 91 bb 00 lds r24, 0x00BB
740: 98 17 cp r25, r24
742: 41 f0 breq .+16 ; 0x754 <UIMgr_flushTxBuffer+0x1c>
744: dc df rcall .-72 ; 0x6fe <UIMgr_readTxFifo>
746: 13 d2 rcall .+1062 ; 0xb6e <UartInt_txByte>
748: 90 91 ba 00 lds r25, 0x00BA
74c: 80 91 bb 00 lds r24, 0x00BB
750: 98 17 cp r25, r24
752: c1 f7 brne .-16 ; 0x744 <UIMgr_flushTxBuffer+0xc>
754: 08 95 ret
00000756 <UIMgr_txBuffer>:
756: 1f 93 push r17
758: cf 93 push r28
75a: df 93 push r29
75c: ec 01 movw r28, r24
75e: 16 2f mov r17, r22
760: 11 50 subi r17, 0x01 ; 1
762: 1f 3f cpi r17, 0xFF ; 255
764: 21 f0 breq .+8 ; 0x76e <UIMgr_txBuffer+0x18>
766: 89 91 ld r24, Y+
768: 02 d2 rcall .+1028 ; 0xb6e <UartInt_txByte>
76a: 11 50 subi r17, 0x01 ; 1
76c: e0 f7 brcc .-8 ; 0x766 <UIMgr_txBuffer+0x10>
76e: df 91 pop r29
770: cf 91 pop r28
772: 1f 91 pop r17
774: 08 95 ret
00000776 <UIMgr_transmitPendingData>:
776: 90 91 ba 00 lds r25, 0x00BA
77a: 80 91 bb 00 lds r24, 0x00BB
77e: 98 17 cp r25, r24
780: 11 f0 breq .+4 ; 0x786 <UIMgr_transmitPendingData+0x10>
782: bd df rcall .-134 ; 0x6fe <UIMgr_readTxFifo>
784: f4 d1 rcall .+1000 ; 0xb6e <UartInt_txByte>
786: 08 95 ret
00000788 <UIMgr_convertTokenToCmd>:
788: 90 91 bf 00 lds r25, 0x00BF
78c: 90 35 cpi r25, 0x50 ; 80
78e: 41 f4 brne .+16 ; 0x7a0 <UIMgr_convertTokenToCmd+0x18>
790: 80 91 c0 00 lds r24, 0x00C0
794: 87 34 cpi r24, 0x47 ; 71
796: 09 f5 brne .+66 ; 0x7da <UIMgr_convertTokenToCmd+0x52>
798: 81 e0 ldi r24, 0x01 ; 1
79a: 80 93 62 00 sts 0x0062, r24
79e: 48 c0 rjmp .+144 ; 0x830 <UIMgr_convertTokenToCmd+0xa8>
7a0: 97 34 cpi r25, 0x47 ; 71
7a2: 39 f4 brne .+14 ; 0x7b2 <UIMgr_convertTokenToCmd+0x2a>
7a4: 80 91 c0 00 lds r24, 0x00C0
7a8: 86 35 cpi r24, 0x56 ; 86
7aa: 09 f5 brne .+66 ; 0x7ee <UIMgr_convertTokenToCmd+0x66>
7ac: 10 92 62 00 sts 0x0062, r1
7b0: 3f c0 rjmp .+126 ; 0x830 <UIMgr_convertTokenToCmd+0xa8>
7b2: 94 34 cpi r25, 0x44 ; 68
7b4: 41 f4 brne .+16 ; 0x7c6 <UIMgr_convertTokenToCmd+0x3e>
7b6: 80 91 c0 00 lds r24, 0x00C0
7ba: 86 34 cpi r24, 0x46 ; 70
7bc: 11 f5 brne .+68 ; 0x802 <UIMgr_convertTokenToCmd+0x7a>
7be: 83 e0 ldi r24, 0x03 ; 3
7c0: 80 93 62 00 sts 0x0062, r24
7c4: 35 c0 rjmp .+106 ; 0x830 <UIMgr_convertTokenToCmd+0xa8>
7c6: 93 34 cpi r25, 0x43 ; 67
7c8: 41 f4 brne .+16 ; 0x7da <UIMgr_convertTokenToCmd+0x52>
7ca: 80 91 c0 00 lds r24, 0x00C0
7ce: 82 35 cpi r24, 0x52 ; 82
7d0: 11 f5 brne .+68 ; 0x816 <UIMgr_convertTokenToCmd+0x8e>
7d2: 82 e0 ldi r24, 0x02 ; 2
7d4: 80 93 62 00 sts 0x0062, r24
7d8: 2b c0 rjmp .+86 ; 0x830 <UIMgr_convertTokenToCmd+0xa8>
7da: 95 34 cpi r25, 0x45 ; 69
7dc: 41 f4 brne .+16 ; 0x7ee <UIMgr_convertTokenToCmd+0x66>
7de: 80 91 c0 00 lds r24, 0x00C0
7e2: 84 35 cpi r24, 0x54 ; 84
7e4: 11 f5 brne .+68 ; 0x82a <UIMgr_convertTokenToCmd+0xa2>
7e6: 84 e0 ldi r24, 0x04 ; 4
7e8: 80 93 62 00 sts 0x0062, r24
7ec: 21 c0 rjmp .+66 ; 0x830 <UIMgr_convertTokenToCmd+0xa8>
7ee: 93 35 cpi r25, 0x53 ; 83
7f0: 41 f4 brne .+16 ; 0x802 <UIMgr_convertTokenToCmd+0x7a>
7f2: 80 91 c0 00 lds r24, 0x00C0
7f6: 8d 34 cpi r24, 0x4D ; 77
7f8: c1 f4 brne .+48 ; 0x82a <UIMgr_convertTokenToCmd+0xa2>
7fa: 86 e0 ldi r24, 0x06 ; 6
7fc: 80 93 62 00 sts 0x0062, r24
800: 17 c0 rjmp .+46 ; 0x830 <UIMgr_convertTokenToCmd+0xa8>
802: 94 34 cpi r25, 0x44 ; 68
804: 41 f4 brne .+16 ; 0x816 <UIMgr_convertTokenToCmd+0x8e>
806: 80 91 c0 00 lds r24, 0x00C0
80a: 84 35 cpi r24, 0x54 ; 84
80c: 71 f4 brne .+28 ; 0x82a <UIMgr_convertTokenToCmd+0xa2>
80e: 85 e0 ldi r24, 0x05 ; 5
810: 80 93 62 00 sts 0x0062, r24
814: 0d c0 rjmp .+26 ; 0x830 <UIMgr_convertTokenToCmd+0xa8>
816: 92 35 cpi r25, 0x52 ; 82
818: 41 f4 brne .+16 ; 0x82a <UIMgr_convertTokenToCmd+0xa2>
81a: 80 91 c0 00 lds r24, 0x00C0
81e: 83 35 cpi r24, 0x53 ; 83
820: 21 f4 brne .+8 ; 0x82a <UIMgr_convertTokenToCmd+0xa2>
822: 87 e0 ldi r24, 0x07 ; 7
824: 80 93 62 00 sts 0x0062, r24
828: 03 c0 rjmp .+6 ; 0x830 <UIMgr_convertTokenToCmd+0xa8>
82a: 89 e0 ldi r24, 0x09 ; 9
82c: 80 93 62 00 sts 0x0062, r24
830: 83 e0 ldi r24, 0x03 ; 3
832: ef eb ldi r30, 0xBF ; 191
834: f0 e0 ldi r31, 0x00 ; 0
836: 11 92 st Z+, r1
838: 8a 95 dec r24
83a: e9 f7 brne .-6 ; 0x836 <UIMgr_convertTokenToCmd+0xae>
83c: 10 92 be 00 sts 0x00BE, r1
840: 10 92 bd 00 sts 0x00BD, r1
844: 08 95 ret
00000846 <UIMgr_init>:
846: 10 92 bf 00 sts 0x00BF, r1
84a: 10 92 c0 00 sts 0x00C0, r1
84e: 10 92 c1 00 sts 0x00C1, r1
852: 10 92 c2 00 sts 0x00C2, r1
856: 80 e4 ldi r24, 0x40 ; 64
858: e3 ec ldi r30, 0xC3 ; 195
85a: f0 e0 ldi r31, 0x00 ; 0
85c: 98 2f mov r25, r24
85e: 11 92 st Z+, r1
860: 9a 95 dec r25
862: e9 f7 brne .-6 ; 0x85e <UIMgr_init+0x18>
864: e4 e9 ldi r30, 0x94 ; 148
866: f2 e0 ldi r31, 0x02 ; 2
868: 11 92 st Z+, r1
86a: 8a 95 dec r24
86c: e9 f7 brne .-6 ; 0x868 <UIMgr_init+0x22>
86e: 80 e2 ldi r24, 0x20 ; 32
870: e4 e7 ldi r30, 0x74 ; 116
872: f2 e0 ldi r31, 0x02 ; 2
874: 11 92 st Z+, r1
876: 8a 95 dec r24
878: e9 f7 brne .-6 ; 0x874 <UIMgr_init+0x2e>
87a: 08 95 ret
0000087c <UIMgr_convertTokenToValue>:
87c: 8f eb ldi r24, 0xBF ; 191
87e: 90 e0 ldi r25, 0x00 ; 0
880: dc d3 rcall .+1976 ; 0x103a <atoi>
882: 9c 01 movw r18, r24
884: 8f 3f cpi r24, 0xFF ; 255
886: 91 05 cpc r25, r1
888: 69 f0 breq .+26 ; 0x8a4 <UIMgr_convertTokenToValue+0x28>
88a: 60 f0 brcs .+24 ; 0x8a4 <UIMgr_convertTokenToValue+0x28>
88c: 89 e0 ldi r24, 0x09 ; 9
88e: 80 93 62 00 sts 0x0062, r24
892: 80 91 bc 00 lds r24, 0x00BC
896: e3 ec ldi r30, 0xC3 ; 195
898: f0 e0 ldi r31, 0x00 ; 0
89a: e8 0f add r30, r24
89c: f1 1d adc r31, r1
89e: 8f ef ldi r24, 0xFF ; 255
8a0: 80 83 st Z, r24
8a2: 07 c0 rjmp .+14 ; 0x8b2 <UIMgr_convertTokenToValue+0x36>
8a4: 80 91 bc 00 lds r24, 0x00BC
8a8: e3 ec ldi r30, 0xC3 ; 195
8aa: f0 e0 ldi r31, 0x00 ; 0
8ac: e8 0f add r30, r24
8ae: f1 1d adc r31, r1
8b0: 20 83 st Z, r18
8b2: 83 e0 ldi r24, 0x03 ; 3
8b4: ef eb ldi r30, 0xBF ; 191
8b6: f0 e0 ldi r31, 0x00 ; 0
8b8: 11 92 st Z+, r1
8ba: 8a 95 dec r24
8bc: e9 f7 brne .-6 ; 0x8b8 <UIMgr_convertTokenToValue+0x3c>
8be: 10 92 be 00 sts 0x00BE, r1
8c2: 10 92 bd 00 sts 0x00BD, r1
8c6: 08 95 ret
000008c8 <UIMgr_processReceivedData>:
8c8: 6f 92 push r6
8ca: 7f 92 push r7
8cc: 8f 92 push r8
8ce: 9f 92 push r9
8d0: af 92 push r10
8d2: bf 92 push r11
8d4: cf 92 push r12
8d6: df 92 push r13
8d8: ef 92 push r14
8da: ff 92 push r15
8dc: 1f 93 push r17
8de: cf 93 push r28
8e0: df 93 push r29
8e2: 0f 2e mov r0, r31
8e4: f4 e7 ldi r31, 0x74 ; 116
8e6: cf 2e mov r12, r31
8e8: f2 e0 ldi r31, 0x02 ; 2
8ea: df 2e mov r13, r31
8ec: f0 2d mov r31, r0
8ee: 0f 2e mov r0, r31
8f0: ff eb ldi r31, 0xBF ; 191
8f2: af 2e mov r10, r31
8f4: f0 e0 ldi r31, 0x00 ; 0
8f6: bf 2e mov r11, r31
8f8: f0 2d mov r31, r0
8fa: 0f 2e mov r0, r31
8fc: f3 ec ldi r31, 0xC3 ; 195
8fe: ef 2e mov r14, r31
900: f0 e0 ldi r31, 0x00 ; 0
902: ff 2e mov r15, r31
904: f0 2d mov r31, r0
906: 0f 2e mov r0, r31
908: f0 e0 ldi r31, 0x00 ; 0
90a: 8f 2e mov r8, r31
90c: f3 e0 ldi r31, 0x03 ; 3
90e: 9f 2e mov r9, r31
910: f0 2d mov r31, r0
912: 0f 2e mov r0, r31
914: f3 e6 ldi r31, 0x63 ; 99
916: 6f 2e mov r6, r31
918: f0 e0 ldi r31, 0x00 ; 0
91a: 7f 2e mov r7, r31
91c: f0 2d mov r31, r0
91e: fa c0 rjmp .+500 ; 0xb14 <UIMgr_processReceivedData+0x24c>
920: f8 94 cli
922: f6 01 movw r30, r12
924: e9 0f add r30, r25
926: f1 1d adc r31, r1
928: 20 81 ld r18, Z
92a: 89 2f mov r24, r25
92c: 8f 5f subi r24, 0xFF ; 255
92e: 8f 71 andi r24, 0x1F ; 31
930: 80 93 b9 00 sts 0x00B9, r24
934: 78 94 sei
936: 2d 30 cpi r18, 0x0D ; 13
938: 09 f0 breq .+2 ; 0x93c <UIMgr_processReceivedData+0x74>
93a: a9 c0 rjmp .+338 ; 0xa8e <UIMgr_processReceivedData+0x1c6>
93c: 80 91 bc 00 lds r24, 0x00BC
940: 88 23 and r24, r24
942: 11 f4 brne .+4 ; 0x948 <UIMgr_processReceivedData+0x80>
944: 21 df rcall .-446 ; 0x788 <UIMgr_convertTokenToCmd>
946: 06 c0 rjmp .+12 ; 0x954 <UIMgr_processReceivedData+0x8c>
948: 99 df rcall .-206 ; 0x87c <UIMgr_convertTokenToValue>
94a: 80 91 bc 00 lds r24, 0x00BC
94e: 8f 5f subi r24, 0xFF ; 255
950: 80 93 bc 00 sts 0x00BC, r24
954: 84 e6 ldi r24, 0x64 ; 100
956: 90 e0 ldi r25, 0x00 ; 0
958: a6 d2 rcall .+1356 ; 0xea6 <Utility_delay>
95a: 80 91 62 00 lds r24, 0x0062
95e: 88 50 subi r24, 0x08 ; 8
960: 82 30 cpi r24, 0x02 ; 2
962: 58 f4 brcc .+22 ; 0x97a <UIMgr_processReceivedData+0xb2>
964: 8e e4 ldi r24, 0x4E ; 78
966: da de rcall .-588 ; 0x71c <UIMgr_writeTxFifo>
968: 83 e4 ldi r24, 0x43 ; 67
96a: d8 de rcall .-592 ; 0x71c <UIMgr_writeTxFifo>
96c: 8b e4 ldi r24, 0x4B ; 75
96e: d6 de rcall .-596 ; 0x71c <UIMgr_writeTxFifo>
970: 8d e0 ldi r24, 0x0D ; 13
972: d4 de rcall .-600 ; 0x71c <UIMgr_writeTxFifo>
974: 80 e9 ldi r24, 0x90 ; 144
976: 05 dc rcall .-2038 ; 0x182 <Exec_writeEventFifo>
978: 82 c0 rjmp .+260 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
97a: 81 e4 ldi r24, 0x41 ; 65
97c: cf de rcall .-610 ; 0x71c <UIMgr_writeTxFifo>
97e: 83 e4 ldi r24, 0x43 ; 67
980: cd de rcall .-614 ; 0x71c <UIMgr_writeTxFifo>
982: 8b e4 ldi r24, 0x4B ; 75
984: cb de rcall .-618 ; 0x71c <UIMgr_writeTxFifo>
986: 8d e0 ldi r24, 0x0D ; 13
988: c9 de rcall .-622 ; 0x71c <UIMgr_writeTxFifo>
98a: 80 e9 ldi r24, 0x90 ; 144
98c: fa db rcall .-2060 ; 0x182 <Exec_writeEventFifo>
98e: 80 91 62 00 lds r24, 0x0062
992: 81 30 cpi r24, 0x01 ; 1
994: 09 f4 brne .+2 ; 0x998 <UIMgr_processReceivedData+0xd0>
996: 73 c0 rjmp .+230 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
998: 88 23 and r24, r24
99a: 69 f4 brne .+26 ; 0x9b6 <UIMgr_processReceivedData+0xee>
99c: 80 91 63 00 lds r24, 0x0063
9a0: 88 23 and r24, r24
9a2: 09 f4 brne .+2 ; 0x9a6 <UIMgr_processReceivedData+0xde>
9a4: 6c c0 rjmp .+216 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
9a6: e3 01 movw r28, r6
9a8: 21 96 adiw r28, 0x01 ; 1
9aa: b8 de rcall .-656 ; 0x71c <UIMgr_writeTxFifo>
9ac: 88 81 ld r24, Y
9ae: 88 23 and r24, r24
9b0: 09 f4 brne .+2 ; 0x9b4 <UIMgr_processReceivedData+0xec>
9b2: 65 c0 rjmp .+202 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
9b4: f9 cf rjmp .-14 ; 0x9a8 <UIMgr_processReceivedData+0xe0>
9b6: 87 30 cpi r24, 0x07 ; 7
9b8: 11 f4 brne .+4 ; 0x9be <UIMgr_processReceivedData+0xf6>
9ba: a1 db rcall .-2238 ; 0xfe <CamInt_resetCam>
9bc: 60 c0 rjmp .+192 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
9be: 83 30 cpi r24, 0x03 ; 3
9c0: 31 f4 brne .+12 ; 0x9ce <UIMgr_processReceivedData+0x106>
9c2: 84 e6 ldi r24, 0x64 ; 100
9c4: 90 e0 ldi r25, 0x00 ; 0
9c6: 6f d2 rcall .+1246 ; 0xea6 <Utility_delay>
9c8: 82 e0 ldi r24, 0x02 ; 2
9ca: db db rcall .-2122 ; 0x182 <Exec_writeEventFifo>
9cc: 58 c0 rjmp .+176 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
9ce: 82 30 cpi r24, 0x02 ; 2
9d0: 91 f4 brne .+36 ; 0x9f6 <UIMgr_processReceivedData+0x12e>
9d2: 80 91 bc 00 lds r24, 0x00BC
9d6: 82 30 cpi r24, 0x02 ; 2
9d8: 60 f0 brcs .+24 ; 0x9f2 <UIMgr_processReceivedData+0x12a>
9da: 11 e0 ldi r17, 0x01 ; 1
9dc: f7 01 movw r30, r14
9de: e1 0f add r30, r17
9e0: f1 1d adc r31, r1
9e2: 61 81 ldd r22, Z+1 ; 0x01
9e4: 80 81 ld r24, Z
9e6: 05 d2 rcall .+1034 ; 0xdf2 <CamConfig_setCamReg>
9e8: 1e 5f subi r17, 0xFE ; 254
9ea: 80 91 bc 00 lds r24, 0x00BC
9ee: 18 17 cp r17, r24
9f0: a8 f3 brcs .-22 ; 0x9dc <UIMgr_processReceivedData+0x114>
9f2: 04 d2 rcall .+1032 ; 0xdfc <CamConfig_sendFifoCmds>
9f4: 44 c0 rjmp .+136 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
9f6: 84 30 cpi r24, 0x04 ; 4
9f8: 31 f4 brne .+12 ; 0xa06 <UIMgr_processReceivedData+0x13e>
9fa: 84 e6 ldi r24, 0x64 ; 100
9fc: 90 e0 ldi r25, 0x00 ; 0
9fe: 53 d2 rcall .+1190 ; 0xea6 <Utility_delay>
a00: 80 e8 ldi r24, 0x80 ; 128
a02: bf db rcall .-2178 ; 0x182 <Exec_writeEventFifo>
a04: 3c c0 rjmp .+120 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
a06: 85 30 cpi r24, 0x05 ; 5
a08: 19 f4 brne .+6 ; 0xa10 <UIMgr_processReceivedData+0x148>
a0a: 81 e8 ldi r24, 0x81 ; 129
a0c: ba db rcall .-2188 ; 0x182 <Exec_writeEventFifo>
a0e: 37 c0 rjmp .+110 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
a10: 86 30 cpi r24, 0x06 ; 6
a12: 09 f0 breq .+2 ; 0xa16 <UIMgr_processReceivedData+0x14e>
a14: 34 c0 rjmp .+104 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
a16: 80 91 bc 00 lds r24, 0x00BC
a1a: 88 23 and r24, r24
a1c: 81 f1 breq .+96 ; 0xa7e <UIMgr_processReceivedData+0x1b6>
a1e: 40 e0 ldi r20, 0x00 ; 0
a20: 84 2f mov r24, r20
a22: 99 27 eor r25, r25
a24: 9c 01 movw r18, r24
a26: 2f 5f subi r18, 0xFF ; 255
a28: 3f 4f sbci r19, 0xFF ; 255
a2a: f9 01 movw r30, r18
a2c: ee 0d add r30, r14
a2e: ff 1d adc r31, r15
a30: e0 81 ld r30, Z
a32: ec 01 movw r28, r24
a34: c8 0d add r28, r8
a36: d9 1d adc r29, r9
a38: e8 83 st Y, r30
uint8_t
eeprom_read_byte (const uint8_t *addr)
{
uint8_t result;
__asm__ __volatile__
a3a: d9 01 movw r26, r18
a3c: 32 d3 rcall .+1636 ; 0x10a2 <__eeprom_read_byte_1C1D1E>
a3e: 80 2d mov r24, r0
a40: e8 17 cp r30, r24
a42: c1 f0 breq .+48 ; 0xa74 <UIMgr_processReceivedData+0x1ac>
void
eeprom_write_byte (uint8_t *addr,uint8_t value)
{
__asm__ __volatile__ (
a44: d9 01 movw r26, r18
a46: 0e 2e mov r0, r30
a48: 39 d3 rcall .+1650 ; 0x10bc <__eeprom_write_byte_1C1D1E>
a4a: d9 01 movw r26, r18
a4c: 2a d3 rcall .+1620 ; 0x10a2 <__eeprom_read_byte_1C1D1E>
a4e: 80 2d mov r24, r0
a50: 98 81 ld r25, Y
a52: 89 17 cp r24, r25
a54: 79 f0 breq .+30 ; 0xa74 <UIMgr_processReceivedData+0x1ac>
void
eeprom_write_byte (uint8_t *addr,uint8_t value)
{
__asm__ __volatile__ (
a56: d9 01 movw r26, r18
a58: 09 2e mov r0, r25
a5a: 30 d3 rcall .+1632 ; 0x10bc <__eeprom_write_byte_1C1D1E>
a5c: d9 01 movw r26, r18
a5e: 21 d3 rcall .+1602 ; 0x10a2 <__eeprom_read_byte_1C1D1E>
a60: 80 2d mov r24, r0
a62: 98 81 ld r25, Y
a64: 89 17 cp r24, r25
a66: 31 f0 breq .+12 ; 0xa74 <UIMgr_processReceivedData+0x1ac>
void
eeprom_write_byte (uint8_t *addr,uint8_t value)
{
__asm__ __volatile__ (
a68: d9 01 movw r26, r18
a6a: 09 2e mov r0, r25
a6c: 27 d3 rcall .+1614 ; 0x10bc <__eeprom_write_byte_1C1D1E>
a6e: d9 01 movw r26, r18
a70: 18 d3 rcall .+1584 ; 0x10a2 <__eeprom_read_byte_1C1D1E>
a72: 80 2d mov r24, r0
a74: 4f 5f subi r20, 0xFF ; 255
a76: 80 91 bc 00 lds r24, 0x00BC
a7a: 48 17 cp r20, r24
a7c: 88 f2 brcs .-94 ; 0xa20 <UIMgr_processReceivedData+0x158>
a7e: 10 92 bc 00 sts 0x00BC, r1
a82: 80 e4 ldi r24, 0x40 ; 64
a84: f7 01 movw r30, r14
a86: 11 92 st Z+, r1
a88: 8a 95 dec r24
a8a: e9 f7 brne .-6 ; 0xa86 <UIMgr_processReceivedData+0x1be>
a8c: 43 c0 rjmp .+134 ; 0xb14 <UIMgr_processReceivedData+0x24c>
a8e: 20 32 cpi r18, 0x20 ; 32
a90: 09 f5 brne .+66 ; 0xad4 <UIMgr_processReceivedData+0x20c>
a92: 80 91 bc 00 lds r24, 0x00BC
a96: 88 23 and r24, r24
a98: 39 f4 brne .+14 ; 0xaa8 <UIMgr_processReceivedData+0x1e0>
a9a: 76 de rcall .-788 ; 0x788 <UIMgr_convertTokenToCmd>
a9c: 80 91 bc 00 lds r24, 0x00BC
aa0: 8f 5f subi r24, 0xFF ; 255
aa2: 80 93 bc 00 sts 0x00BC, r24
aa6: 36 c0 rjmp .+108 ; 0xb14 <UIMgr_processReceivedData+0x24c>
aa8: 99 27 eor r25, r25
aaa: 01 96 adiw r24, 0x01 ; 1
aac: 80 34 cpi r24, 0x40 ; 64
aae: 91 05 cpc r25, r1
ab0: 54 f0 brlt .+20 ; 0xac6 <UIMgr_processReceivedData+0x1fe>
ab2: 10 92 bd 00 sts 0x00BD, r1
ab6: 10 92 be 00 sts 0x00BE, r1
aba: 10 92 bc 00 sts 0x00BC, r1
abe: 89 e0 ldi r24, 0x09 ; 9
ac0: 80 93 62 00 sts 0x0062, r24
ac4: 27 c0 rjmp .+78 ; 0xb14 <UIMgr_processReceivedData+0x24c>
ac6: da de rcall .-588 ; 0x87c <UIMgr_convertTokenToValue>
ac8: 80 91 bc 00 lds r24, 0x00BC
acc: 8f 5f subi r24, 0xFF ; 255
ace: 80 93 bc 00 sts 0x00BC, r24
ad2: 20 c0 rjmp .+64 ; 0xb14 <UIMgr_processReceivedData+0x24c>
ad4: 82 2f mov r24, r18
ad6: 81 54 subi r24, 0x41 ; 65
ad8: 8a 31 cpi r24, 0x1A ; 26
ada: 18 f0 brcs .+6 ; 0xae2 <UIMgr_processReceivedData+0x21a>
adc: 8f 5e subi r24, 0xEF ; 239
ade: 8a 30 cpi r24, 0x0A ; 10
ae0: b0 f4 brcc .+44 ; 0xb0e <UIMgr_processReceivedData+0x246>
ae2: 80 91 be 00 lds r24, 0x00BE
ae6: f5 01 movw r30, r10
ae8: e8 0f add r30, r24
aea: f1 1d adc r31, r1
aec: 20 83 st Z, r18
aee: 90 91 bd 00 lds r25, 0x00BD
af2: 9f 5f subi r25, 0xFF ; 255
af4: 90 93 bd 00 sts 0x00BD, r25
af8: 8f 5f subi r24, 0xFF ; 255
afa: 80 93 be 00 sts 0x00BE, r24
afe: 94 30 cpi r25, 0x04 ; 4
b00: 48 f0 brcs .+18 ; 0xb14 <UIMgr_processReceivedData+0x24c>
b02: 89 e0 ldi r24, 0x09 ; 9
b04: 80 93 62 00 sts 0x0062, r24
b08: 10 92 be 00 sts 0x00BE, r1
b0c: 03 c0 rjmp .+6 ; 0xb14 <UIMgr_processReceivedData+0x24c>
b0e: 89 e0 ldi r24, 0x09 ; 9
b10: 80 93 62 00 sts 0x0062, r24
b14: 90 91 b9 00 lds r25, 0x00B9
b18: 80 91 b8 00 lds r24, 0x00B8
b1c: 89 17 cp r24, r25
b1e: 09 f0 breq .+2 ; 0xb22 <UIMgr_processReceivedData+0x25a>
b20: ff ce rjmp .-514 ; 0x920 <UIMgr_processReceivedData+0x58>
b22: e8 94 clt
b24: df 91 pop r29
b26: cf 91 pop r28
b28: 1f 91 pop r17
b2a: ff 90 pop r15
b2c: ef 90 pop r14
b2e: df 90 pop r13
b30: cf 90 pop r12
b32: bf 90 pop r11
b34: af 90 pop r10
b36: 9f 90 pop r9
b38: 8f 90 pop r8
b3a: 7f 90 pop r7
b3c: 6f 90 pop r6
b3e: 08 95 ret
00000b40 <UIMgr_dispatchEvent>:
b40: 80 31 cpi r24, 0x10 ; 16
b42: 29 f0 breq .+10 ; 0xb4e <UIMgr_dispatchEvent+0xe>
b44: 80 39 cpi r24, 0x90 ; 144
b46: 39 f0 breq .+14 ; 0xb56 <UIMgr_dispatchEvent+0x16>
b48: 81 30 cpi r24, 0x01 ; 1
b4a: 31 f4 brne .+12 ; 0xb58 <UIMgr_dispatchEvent+0x18>
b4c: 02 c0 rjmp .+4 ; 0xb52 <UIMgr_dispatchEvent+0x12>
b4e: 13 de rcall .-986 ; 0x776 <UIMgr_transmitPendingData>
b50: 08 95 ret
b52: ba de rcall .-652 ; 0x8c8 <UIMgr_processReceivedData>
b54: 08 95 ret
b56: f0 dd rcall .-1056 ; 0x738 <UIMgr_flushTxBuffer>
b58: 08 95 ret
00000b5a <UartInt_init>:
b5a: 10 bc out 0x20, r1 ; 32
b5c: 82 e1 ldi r24, 0x12 ; 18
b5e: 89 b9 out 0x09, r24 ; 9
b60: 88 e9 ldi r24, 0x98 ; 152
b62: 8a b9 out 0x0a, r24 ; 10
b64: 86 e8 ldi r24, 0x86 ; 134
b66: 80 bd out 0x20, r24 ; 32
b68: 82 e0 ldi r24, 0x02 ; 2
b6a: 8b b9 out 0x0b, r24 ; 11
b6c: 08 95 ret
00000b6e <UartInt_txByte>:
b6e: 5d 9b sbis 0x0b, 5 ; 11
b70: fe cf rjmp .-4 ; 0xb6e <UartInt_txByte>
b72: 8c b9 out 0x0c, r24 ; 12
b74: 08 95 ret
00000b76 <__vector_11>:
b76: 1f 92 push r1
b78: 0f 92 push r0
b7a: 0f b6 in r0, 0x3f ; 63
b7c: 0f 92 push r0
b7e: 11 24 eor r1, r1
b80: 8f 93 push r24
b82: 9f 93 push r25
b84: ef 93 push r30
b86: ff 93 push r31
b88: 80 91 b8 00 lds r24, 0x00B8
b8c: 9c b1 in r25, 0x0c ; 12
b8e: e4 e7 ldi r30, 0x74 ; 116
b90: f2 e0 ldi r31, 0x02 ; 2
b92: e8 0f add r30, r24
b94: f1 1d adc r31, r1
b96: 90 83 st Z, r25
b98: 8f 5f subi r24, 0xFF ; 255
b9a: 8f 71 andi r24, 0x1F ; 31
b9c: 80 93 b8 00 sts 0x00B8, r24
ba0: 80 91 70 00 lds r24, 0x0070
ba4: ec e6 ldi r30, 0x6C ; 108
ba6: f2 e0 ldi r31, 0x02 ; 2
ba8: e8 0f add r30, r24
baa: f1 1d adc r31, r1
bac: 91 e0 ldi r25, 0x01 ; 1
bae: 90 83 st Z, r25
bb0: 8f 5f subi r24, 0xFF ; 255
bb2: 87 70 andi r24, 0x07 ; 7
bb4: 80 93 70 00 sts 0x0070, r24
bb8: ff 91 pop r31
bba: ef 91 pop r30
bbc: 9f 91 pop r25
bbe: 8f 91 pop r24
bc0: 0f 90 pop r0
bc2: 0f be out 0x3f, r0 ; 63
bc4: 0f 90 pop r0
bc6: 1f 90 pop r1
bc8: 18 95 reti
00000bca <I2CInt_init>:
bca: 11 b8 out 0x01, r1 ; 1
bcc: 88 e4 ldi r24, 0x48 ; 72
bce: 80 b9 out 0x00, r24 ; 0
bd0: 08 95 ret
00000bd2 <I2CInt_writeData>:
bd2: 98 2f mov r25, r24
bd4: 80 91 08 01 lds r24, 0x0108
bd8: 88 23 and r24, r24
bda: e4 f3 brlt .-8 ; 0xbd4 <I2CInt_writeData+0x2>
bdc: 06 b6 in r0, 0x36 ; 54
bde: 04 fc sbrc r0, 4
be0: fd cf rjmp .-6 ; 0xbdc <I2CInt_writeData+0xa>
be2: 90 93 03 01 sts 0x0103, r25
be6: 70 93 05 01 sts 0x0105, r23
bea: 60 93 04 01 sts 0x0104, r22
bee: 40 93 07 01 sts 0x0107, r20
bf2: 10 92 06 01 sts 0x0106, r1
bf6: 10 92 09 01 sts 0x0109, r1
bfa: 85 ea ldi r24, 0xA5 ; 165
bfc: 86 bf out 0x36, r24 ; 54
bfe: 80 91 08 01 lds r24, 0x0108
c02: 80 68 ori r24, 0x80 ; 128
c04: 80 93 08 01 sts 0x0108, r24
c08: 08 95 ret
00000c0a <I2CInt_readData>:
c0a: 98 2f mov r25, r24
c0c: 80 91 08 01 lds r24, 0x0108
c10: 88 23 and r24, r24
c12: e4 f3 brlt .-8 ; 0xc0c <I2CInt_readData+0x2>
c14: 90 93 03 01 sts 0x0103, r25
c18: 70 93 05 01 sts 0x0105, r23
c1c: 60 93 04 01 sts 0x0104, r22
c20: 40 93 07 01 sts 0x0107, r20
c24: 81 e0 ldi r24, 0x01 ; 1
c26: 80 93 06 01 sts 0x0106, r24
c2a: 10 92 09 01 sts 0x0109, r1
c2e: 85 ea ldi r24, 0xA5 ; 165
c30: 86 bf out 0x36, r24 ; 54
c32: 80 91 08 01 lds r24, 0x0108
c36: 80 68 ori r24, 0x80 ; 128
c38: 80 93 08 01 sts 0x0108, r24
c3c: 08 95 ret
00000c3e <I2CInt_isI2cBusy>:
c3e: 80 91 08 01 lds r24, 0x0108
c42: 88 1f adc r24, r24
c44: 88 27 eor r24, r24
c46: 88 1f adc r24, r24
c48: 99 27 eor r25, r25
c4a: 08 95 ret
00000c4c <__vector_17>:
c4c: 1f 92 push r1
c4e: 0f 92 push r0
c50: 0f b6 in r0, 0x3f ; 63
c52: 0f 92 push r0
c54: 11 24 eor r1, r1
c56: 8f 93 push r24
c58: 9f 93 push r25
c5a: af 93 push r26
c5c: bf 93 push r27
c5e: ef 93 push r30
c60: ff 93 push r31
c62: 81 b1 in r24, 0x01 ; 1
c64: 99 27 eor r25, r25
c66: aa 27 eor r26, r26
c68: bb 27 eor r27, r27
c6a: 88 7f andi r24, 0xF8 ; 248
c6c: 90 70 andi r25, 0x00 ; 0
c6e: a0 70 andi r26, 0x00 ; 0
c70: b0 70 andi r27, 0x00 ; 0
c72: fc 01 movw r30, r24
c74: 38 97 sbiw r30, 0x08 ; 8
c76: e1 35 cpi r30, 0x51 ; 81
c78: f1 05 cpc r31, r1
c7a: 08 f0 brcs .+2 ; 0xc7e <__vector_17+0x32>
c7c: 97 c0 rjmp .+302 ; 0xdac <__vector_17+0x160>
c7e: ed 5e subi r30, 0xED ; 237
c80: ff 4f sbci r31, 0xFF ; 255
c82: 09 94 ijmp
c84: 80 91 09 01 lds r24, 0x0109
c88: 83 30 cpi r24, 0x03 ; 3
c8a: 48 f0 brcs .+18 ; 0xc9e <__vector_17+0x52>
c8c: 86 b7 in r24, 0x36 ; 54
c8e: 80 69 ori r24, 0x90 ; 144
c90: 86 bf out 0x36, r24 ; 54
c92: 80 91 08 01 lds r24, 0x0108
c96: 8f 77 andi r24, 0x7F ; 127
c98: 80 93 08 01 sts 0x0108, r24
c9c: 87 c0 rjmp .+270 ; 0xdac <__vector_17+0x160>
c9e: 80 91 03 01 lds r24, 0x0103
ca2: 90 91 06 01 lds r25, 0x0106
ca6: 88 0f add r24, r24
ca8: 89 0f add r24, r25
caa: 83 b9 out 0x03, r24 ; 3
cac: 86 b7 in r24, 0x36 ; 54
cae: 8f 7d andi r24, 0xDF ; 223
cb0: 86 bf out 0x36, r24 ; 54
cb2: 7c c0 rjmp .+248 ; 0xdac <__vector_17+0x160>
cb4: 10 92 09 01 sts 0x0109, r1
cb8: e0 91 04 01 lds r30, 0x0104
cbc: f0 91 05 01 lds r31, 0x0105
cc0: 81 91 ld r24, Z+
cc2: 83 b9 out 0x03, r24 ; 3
cc4: f0 93 05 01 sts 0x0105, r31
cc8: e0 93 04 01 sts 0x0104, r30
ccc: 86 b7 in r24, 0x36 ; 54
cce: 80 68 ori r24, 0x80 ; 128
cd0: 86 bf out 0x36, r24 ; 54
cd2: 6c c0 rjmp .+216 ; 0xdac <__vector_17+0x160>
cd4: 80 91 09 01 lds r24, 0x0109
cd8: 8f 5f subi r24, 0xFF ; 255
cda: 80 93 09 01 sts 0x0109, r24
cde: 86 b7 in r24, 0x36 ; 54
ce0: 80 6b ori r24, 0xB0 ; 176
ce2: 86 bf out 0x36, r24 ; 54
ce4: 63 c0 rjmp .+198 ; 0xdac <__vector_17+0x160>
ce6: 80 91 07 01 lds r24, 0x0107
cea: 81 50 subi r24, 0x01 ; 1
cec: 80 93 07 01 sts 0x0107, r24
cf0: 80 91 07 01 lds r24, 0x0107
cf4: 88 23 and r24, r24
cf6: 71 f0 breq .+28 ; 0xd14 <__vector_17+0xc8>
cf8: e0 91 04 01 lds r30, 0x0104
cfc: f0 91 05 01 lds r31, 0x0105
d00: 81 91 ld r24, Z+
d02: 83 b9 out 0x03, r24 ; 3
d04: f0 93 05 01 sts 0x0105, r31
d08: e0 93 04 01 sts 0x0104, r30
d0c: 86 b7 in r24, 0x36 ; 54
d0e: 80 68 ori r24, 0x80 ; 128
d10: 86 bf out 0x36, r24 ; 54
d12: 4c c0 rjmp .+152 ; 0xdac <__vector_17+0x160>
d14: 86 b7 in r24, 0x36 ; 54
d16: 80 69 ori r24, 0x90 ; 144
d18: 86 bf out 0x36, r24 ; 54
d1a: 80 91 08 01 lds r24, 0x0108
d1e: 8f 77 andi r24, 0x7F ; 127
d20: 80 93 08 01 sts 0x0108, r24
d24: 43 c0 rjmp .+134 ; 0xdac <__vector_17+0x160>
d26: 86 b7 in r24, 0x36 ; 54
d28: 80 69 ori r24, 0x90 ; 144
d2a: 86 bf out 0x36, r24 ; 54
d2c: 80 91 08 01 lds r24, 0x0108
d30: 8f 77 andi r24, 0x7F ; 127
d32: 80 93 08 01 sts 0x0108, r24
d36: 3a c0 rjmp .+116 ; 0xdac <__vector_17+0x160>
d38: 80 91 07 01 lds r24, 0x0107
d3c: 81 50 subi r24, 0x01 ; 1
d3e: 80 93 07 01 sts 0x0107, r24
d42: 80 91 07 01 lds r24, 0x0107
d46: 88 23 and r24, r24
d48: 21 f0 breq .+8 ; 0xd52 <__vector_17+0x106>
d4a: 86 b7 in r24, 0x36 ; 54
d4c: 80 6c ori r24, 0xC0 ; 192
d4e: 86 bf out 0x36, r24 ; 54
d50: 2d c0 rjmp .+90 ; 0xdac <__vector_17+0x160>
d52: 86 b7 in r24, 0x36 ; 54
d54: 80 68 ori r24, 0x80 ; 128
d56: 86 bf out 0x36, r24 ; 54
d58: 29 c0 rjmp .+82 ; 0xdac <__vector_17+0x160>
d5a: e0 91 04 01 lds r30, 0x0104
d5e: f0 91 05 01 lds r31, 0x0105
d62: 83 b1 in r24, 0x03 ; 3
d64: 81 93 st Z+, r24
d66: f0 93 05 01 sts 0x0105, r31
d6a: e0 93 04 01 sts 0x0104, r30
d6e: 80 91 07 01 lds r24, 0x0107
d72: 81 50 subi r24, 0x01 ; 1
d74: 80 93 07 01 sts 0x0107, r24
d78: 80 91 07 01 lds r24, 0x0107
d7c: 88 23 and r24, r24
d7e: 21 f0 breq .+8 ; 0xd88 <__vector_17+0x13c>
d80: 86 b7 in r24, 0x36 ; 54
d82: 80 6c ori r24, 0xC0 ; 192
d84: 86 bf out 0x36, r24 ; 54
d86: 12 c0 rjmp .+36 ; 0xdac <__vector_17+0x160>
d88: 86 b7 in r24, 0x36 ; 54
d8a: 8f 7b andi r24, 0xBF ; 191
d8c: 86 bf out 0x36, r24 ; 54
d8e: 0e c0 rjmp .+28 ; 0xdac <__vector_17+0x160>
d90: e0 91 04 01 lds r30, 0x0104
d94: f0 91 05 01 lds r31, 0x0105
d98: 83 b1 in r24, 0x03 ; 3
d9a: 80 83 st Z, r24
d9c: 86 b7 in r24, 0x36 ; 54
d9e: 80 69 ori r24, 0x90 ; 144
da0: 86 bf out 0x36, r24 ; 54
da2: 80 91 08 01 lds r24, 0x0108
da6: 8f 77 andi r24, 0x7F ; 127
da8: 80 93 08 01 sts 0x0108, r24
dac: ff 91 pop r31
dae: ef 91 pop r30
db0: bf 91 pop r27
db2: af 91 pop r26
db4: 9f 91 pop r25
db6: 8f 91 pop r24
db8: 0f 90 pop r0
dba: 0f be out 0x3f, r0 ; 63
dbc: 0f 90 pop r0
dbe: 1f 90 pop r1
dc0: 18 95 reti
00000dc2 <CamConfig_writeTxFifo>:
dc2: 20 91 0a 01 lds r18, 0x010A
dc6: e2 2f mov r30, r18
dc8: ff 27 eor r31, r31
dca: ee 0f add r30, r30
dcc: ff 1f adc r31, r31
dce: ec 52 subi r30, 0x2C ; 44
dd0: fd 4f sbci r31, 0xFD ; 253
dd2: 91 83 std Z+1, r25 ; 0x01
dd4: 80 83 st Z, r24
dd6: 2f 5f subi r18, 0xFF ; 255
dd8: 27 70 andi r18, 0x07 ; 7
dda: 20 93 0a 01 sts 0x010A, r18
dde: 90 e0 ldi r25, 0x00 ; 0
de0: 80 91 0b 01 lds r24, 0x010B
de4: 28 17 cp r18, r24
de6: 09 f4 brne .+2 ; 0xdea <CamConfig_writeTxFifo+0x28>
de8: 91 e0 ldi r25, 0x01 ; 1
dea: 81 e0 ldi r24, 0x01 ; 1
dec: 89 27 eor r24, r25
dee: 99 27 eor r25, r25
df0: 08 95 ret
00000df2 <CamConfig_setCamReg>:
df2: 28 2f mov r18, r24
df4: 36 2f mov r19, r22
df6: c9 01 movw r24, r18
df8: e4 df rcall .-56 ; 0xdc2 <CamConfig_writeTxFifo>
dfa: 08 95 ret
00000dfc <CamConfig_sendFifoCmds>:
dfc: ef 92 push r14
dfe: ff 92 push r15
e00: 0f 93 push r16
e02: 1f 93 push r17
e04: cf 93 push r28
e06: df 93 push r29
e08: cd b7 in r28, 0x3d ; 61
e0a: de b7 in r29, 0x3e ; 62
e0c: 22 97 sbiw r28, 0x02 ; 2
e0e: 0f b6 in r0, 0x3f ; 63
e10: f8 94 cli
e12: de bf out 0x3e, r29 ; 62
e14: 0f be out 0x3f, r0 ; 63
e16: cd bf out 0x3d, r28 ; 61
e18: 0f 2e mov r0, r31
e1a: f4 ed ldi r31, 0xD4 ; 212
e1c: ef 2e mov r14, r31
e1e: f2 e0 ldi r31, 0x02 ; 2
e20: ff 2e mov r15, r31
e22: f0 2d mov r31, r0
e24: 8e 01 movw r16, r28
e26: 0f 5f subi r16, 0xFF ; 255
e28: 1f 4f sbci r17, 0xFF ; 255
e2a: 19 c0 rjmp .+50 ; 0xe5e <CamConfig_sendFifoCmds+0x62>
e2c: e3 2f mov r30, r19
e2e: ff 27 eor r31, r31
e30: ee 0f add r30, r30
e32: ff 1f adc r31, r31
e34: ee 0d add r30, r14
e36: ff 1d adc r31, r15
e38: 91 81 ldd r25, Z+1 ; 0x01
e3a: 20 81 ld r18, Z
e3c: 83 2f mov r24, r19
e3e: 8f 5f subi r24, 0xFF ; 255
e40: 87 70 andi r24, 0x07 ; 7
e42: 80 93 0b 01 sts 0x010B, r24
e46: 9a 83 std Y+2, r25 ; 0x02
e48: 29 83 std Y+1, r18 ; 0x01
e4a: 42 e0 ldi r20, 0x02 ; 2
e4c: b8 01 movw r22, r16
e4e: 80 e6 ldi r24, 0x60 ; 96
e50: c0 de rcall .-640 ; 0xbd2 <I2CInt_writeData>
e52: 84 e6 ldi r24, 0x64 ; 100
e54: 90 e0 ldi r25, 0x00 ; 0
e56: 27 d0 rcall .+78 ; 0xea6 <Utility_delay>
e58: f2 de rcall .-540 ; 0xc3e <I2CInt_isI2cBusy>
e5a: 81 30 cpi r24, 0x01 ; 1
e5c: e9 f3 breq .-6 ; 0xe58 <CamConfig_sendFifoCmds+0x5c>
e5e: 30 91 0b 01 lds r19, 0x010B
e62: 80 91 0a 01 lds r24, 0x010A
e66: 83 17 cp r24, r19
e68: 09 f7 brne .-62 ; 0xe2c <CamConfig_sendFifoCmds+0x30>
e6a: 22 96 adiw r28, 0x02 ; 2
e6c: 0f b6 in r0, 0x3f ; 63
e6e: f8 94 cli
e70: de bf out 0x3e, r29 ; 62
e72: 0f be out 0x3f, r0 ; 63
e74: cd bf out 0x3d, r28 ; 61
e76: df 91 pop r29
e78: cf 91 pop r28
e7a: 1f 91 pop r17
e7c: 0f 91 pop r16
e7e: ff 90 pop r15
e80: ef 90 pop r14
e82: 08 95 ret
00000e84 <CamConfig_init>:
e84: 60 e2 ldi r22, 0x20 ; 32
e86: 84 e1 ldi r24, 0x14 ; 20
e88: b4 df rcall .-152 ; 0xdf2 <CamConfig_setCamReg>
e8a: 60 e4 ldi r22, 0x40 ; 64
e8c: 89 e3 ldi r24, 0x39 ; 57
e8e: b1 df rcall .-158 ; 0xdf2 <CamConfig_setCamReg>
e90: 68 e2 ldi r22, 0x28 ; 40
e92: 82 e1 ldi r24, 0x12 ; 18
e94: ae df rcall .-164 ; 0xdf2 <CamConfig_setCamReg>
e96: 65 e0 ldi r22, 0x05 ; 5
e98: 88 e2 ldi r24, 0x28 ; 40
e9a: ab df rcall .-170 ; 0xdf2 <CamConfig_setCamReg>
e9c: 61 e0 ldi r22, 0x01 ; 1
e9e: 83 e1 ldi r24, 0x13 ; 19
ea0: a8 df rcall .-176 ; 0xdf2 <CamConfig_setCamReg>
ea2: ac df rcall .-168 ; 0xdfc <CamConfig_sendFifoCmds>
ea4: 08 95 ret
00000ea6 <Utility_delay>:
ea6: cf 93 push r28
ea8: df 93 push r29
eaa: cd b7 in r28, 0x3d ; 61
eac: de b7 in r29, 0x3e ; 62
eae: 24 97 sbiw r28, 0x04 ; 4
eb0: 0f b6 in r0, 0x3f ; 63
eb2: f8 94 cli
eb4: de bf out 0x3e, r29 ; 62
eb6: 0f be out 0x3f, r0 ; 63
eb8: cd bf out 0x3d, r28 ; 61
eba: 9c 01 movw r18, r24
ebc: 1a 82 std Y+2, r1 ; 0x02
ebe: 19 82 std Y+1, r1 ; 0x01
ec0: 1c 82 std Y+4, r1 ; 0x04
ec2: 1b 82 std Y+3, r1 ; 0x03
ec4: 1a 82 std Y+2, r1 ; 0x02
ec6: 19 82 std Y+1, r1 ; 0x01
ec8: 89 81 ldd r24, Y+1 ; 0x01
eca: 9a 81 ldd r25, Y+2 ; 0x02
ecc: 82 17 cp r24, r18
ece: 93 07 cpc r25, r19
ed0: e0 f4 brcc .+56 ; 0xf0a <Utility_delay+0x64>
ed2: 1c 82 std Y+4, r1 ; 0x04
ed4: 1b 82 std Y+3, r1 ; 0x03
ed6: 8b 81 ldd r24, Y+3 ; 0x03
ed8: 9c 81 ldd r25, Y+4 ; 0x04
eda: 88 5e subi r24, 0xE8 ; 232
edc: 93 40 sbci r25, 0x03 ; 3
ede: 58 f4 brcc .+22 ; 0xef6 <Utility_delay+0x50>
ee0: 00 00 nop
ee2: 8b 81 ldd r24, Y+3 ; 0x03
ee4: 9c 81 ldd r25, Y+4 ; 0x04
ee6: 01 96 adiw r24, 0x01 ; 1
ee8: 9c 83 std Y+4, r25 ; 0x04
eea: 8b 83 std Y+3, r24 ; 0x03
eec: 8b 81 ldd r24, Y+3 ; 0x03
eee: 9c 81 ldd r25, Y+4 ; 0x04
ef0: 88 5e subi r24, 0xE8 ; 232
ef2: 93 40 sbci r25, 0x03 ; 3
ef4: a8 f3 brcs .-22 ; 0xee0 <Utility_delay+0x3a>
ef6: 89 81 ldd r24, Y+1 ; 0x01
ef8: 9a 81 ldd r25, Y+2 ; 0x02
efa: 01 96 adiw r24, 0x01 ; 1
efc: 9a 83 std Y+2, r25 ; 0x02
efe: 89 83 std Y+1, r24 ; 0x01
f00: 89 81 ldd r24, Y+1 ; 0x01
f02: 9a 81 ldd r25, Y+2 ; 0x02
f04: 82 17 cp r24, r18
f06: 93 07 cpc r25, r19
f08: 20 f3 brcs .-56 ; 0xed2 <Utility_delay+0x2c>
f0a: 24 96 adiw r28, 0x04 ; 4
f0c: 0f b6 in r0, 0x3f ; 63
f0e: f8 94 cli
f10: de bf out 0x3e, r29 ; 62
f12: 0f be out 0x3f, r0 ; 63
f14: cd bf out 0x3d, r28 ; 61
f16: df 91 pop r29
f18: cf 91 pop r28
f1a: 08 95 ret
00000f1c <DebugInt_init>:
***********************************************************/
void DebugInt_init(void)
{
/* set PortD pin6 for output */
DDRD |= 0x40;
f1c: 8e 9a sbi 0x11, 6 ; 17
/* turn on LED */
PORTD |= 0x40;
f1e: 96 9a sbi 0x12, 6 ; 18
Utility_delay(500);
f20: 84 ef ldi r24, 0xF4 ; 244
f22: 91 e0 ldi r25, 0x01 ; 1
f24: c0 df rcall .-128 ; 0xea6 <Utility_delay>
PORTD &= 0xBF;
f26: 96 98 cbi 0x12, 6 ; 18
Utility_delay(500);
f28: 84 ef ldi r24, 0xF4 ; 244
f2a: 91 e0 ldi r25, 0x01 ; 1
f2c: bc df rcall .-136 ; 0xea6 <Utility_delay>
PORTD |= 0x40;
f2e: 96 9a sbi 0x12, 6 ; 18
Utility_delay(500);
f30: 84 ef ldi r24, 0xF4 ; 244
f32: 91 e0 ldi r25, 0x01 ; 1
f34: b8 df rcall .-144 ; 0xea6 <Utility_delay>
PORTD &= 0xBF;
f36: 96 98 cbi 0x12, 6 ; 18
Utility_delay(500);
f38: 84 ef ldi r24, 0xF4 ; 244
f3a: 91 e0 ldi r25, 0x01 ; 1
f3c: b4 df rcall .-152 ; 0xea6 <Utility_delay>
PORTD |= 0x40;
f3e: 96 9a sbi 0x12, 6 ; 18
Utility_delay(500);
f40: 84 ef ldi r24, 0xF4 ; 244
f42: 91 e0 ldi r25, 0x01 ; 1
f44: b0 df rcall .-160 ; 0xea6 <Utility_delay>
PORTD &= 0xBF;
f46: 96 98 cbi 0x12, 6 ; 18
Utility_delay(500);
f48: 84 ef ldi r24, 0xF4 ; 244
f4a: 91 e0 ldi r25, 0x01 ; 1
f4c: ac df rcall .-168 ; 0xea6 <Utility_delay>
PORTD |= 0x40;
f4e: 96 9a sbi 0x12, 6 ; 18
f50: 08 95 ret
00000f52 <CamIntAsm_waitForNewTrackingFrame>:
; set, and the function will return.
;*****************************************************************
CamIntAsm_waitForNewTrackingFrame:
sbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
f52: 96 9a sbi 0x12, 6 ; 18
cbi _SFR_IO_ADDR(PORTD),PD6
f54: 96 98 cbi 0x12, 6 ; 18
sleep
f56: 88 95 sleep
00000f58 <CamIntAsm_acquireTrackingLine>:
;*****************************************************************
; REMEMBER...everything from here on out is critically timed to be
; synchronized with the flow of pixel data from the camera...
;*****************************************************************
CamIntAsm_acquireTrackingLine:
brts _cleanUp
f58: e6 f1 brts .+120 ; 0xfd2 <_cleanUp>
;sbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
;cbi _SFR_IO_ADDR(PORTD),PD6
in tmp1,_SFR_IO_ADDR(TCCR1B) ; Enable the PCLK line to actually
f5a: 3e b5 in r19, 0x2e ; 46
ori tmp1, 0x07 ; feed Timer1
f5c: 37 60 ori r19, 0x07 ; 7
out _SFR_IO_ADDR(TCCR1B),tmp1
f5e: 3e bd out 0x2e, r19 ; 46
; The line is about to start...
ldi pixelCount,0 ; Initialize the RLE stats...
f60: 00 e0 ldi r16, 0x00 ; 0
ldi pixelRunStart,PIXEL_RUN_START_INITIAL ; Remember, we always calculate
f62: 10 e5 ldi r17, 0x50 ; 80
; the pixel run length as
; TCNT1L - pixelRunStart
ldi lastColor,0x00 ; clear out the last color before we start
f64: 20 e0 ldi r18, 0x00 ; 0
mov XH,currLineBuffHigh ; Load the pointer to the current line
f66: b9 2f mov r27, r25
mov XL,currLineBuffLow ; buffer into the X pointer regs
f68: a8 2f mov r26, r24
mov ZH,colorMapHigh ; Load the pointers to the membership
f6a: f7 2f mov r31, r23
mov ZL,colorMapLow ; lookup tables (ZL and YL will be overwritten
f6c: e6 2f mov r30, r22
mov YH,colorMapHigh ; as soon as we start reading data) to Z and Y
f6e: d7 2f mov r29, r23
in tmp1, _SFR_IO_ADDR(TIMSK) ; enable TIMER1 to start counting
f70: 39 b7 in r19, 0x39 ; 57
ori tmp1, ENABLE_PCLK_TIMER1_OVERFLOW_BITMASK ; external PCLK pulses and interrupt on
f72: 34 60 ori r19, 0x04 ; 4
out _SFR_IO_ADDR(TIMSK),tmp1 ; overflow
f74: 39 bf out 0x39, r19 ; 57
ldi tmp1,PIXEL_RUN_START_INITIAL ; set up the TCNT1 to overflow (and
f76: 30 e5 ldi r19, 0x50 ; 80
ldi tmp2,0xFF ; interrupts) after 176 pixels
f78: 4f ef ldi r20, 0xFF ; 255
out _SFR_IO_ADDR(TCNT1H),tmp2
f7a: 4d bd out 0x2d, r20 ; 45
out _SFR_IO_ADDR(TCNT1L),tmp1
f7c: 3c bd out 0x2c, r19 ; 44
mov YL,colorMapLow
f7e: c6 2f mov r28, r22
in tmp1, _SFR_IO_ADDR(GICR) ; enable the HREF interrupt...remember, we
f80: 3b b7 in r19, 0x3b ; 59
; only use this interrupt to synchronize
; the beginning of the line
ori tmp1, HREF_INTERRUPT_ENABLE_MASK
f82: 30 68 ori r19, 0x80 ; 128
out _SFR_IO_ADDR(GICR), tmp1
f84: 3b bf out 0x3b, r19 ; 59
00000f86 <_trackFrame>:
;*******************************************************************************************
; Track Frame handler
;*******************************************************************************************
_trackFrame:
sbi _SFR_IO_ADDR(PORTD),PD6
f86: 96 9a sbi 0x12, 6 ; 18
sleep ; ...And we wait...
f88: 88 95 sleep
; Returning from the interrupt/sleep wakeup will consume
; 14 clock cycles (7 to wakeup from idle sleep, 3 to vector, and 4 to return)
; Disable the HREF interrupt
cbi _SFR_IO_ADDR(PORTD),PD6
f8a: 96 98 cbi 0x12, 6 ; 18
in tmp1, _SFR_IO_ADDR(GICR)
f8c: 3b b7 in r19, 0x3b ; 59
andi tmp1, HREF_INTERRUPT_DISABLE_MASK
f8e: 3f 77 andi r19, 0x7F ; 127
out _SFR_IO_ADDR(GICR), tmp1
f90: 3b bf out 0x3b, r19 ; 59
; A couple of NOPs are needed here to sync up the pixel data...the number (2)
; of NOPs was determined emperically by trial and error.
nop
f92: 00 00 nop
...
00000f96 <_acquirePixelBlock>:
nop
_acquirePixelBlock: ; Clock Cycle Count
in ZL,RB_PORT ; sample the red value (PINB) (1)
f96: e6 b3 in r30, 0x16 ; 22
in YL,G_PORT ; sample the green value (PINC) (1)
f98: c3 b3 in r28, 0x13 ; 19
andi YL,0x0F ; clear the high nibble (1)
f9a: cf 70 andi r28, 0x0F ; 15
ldd color,Z+RED_MEM_OFFSET ; lookup the red membership (2)
f9c: 30 81 ld r19, Z
in ZL,RB_PORT ; sample the blue value (PINB) (1)
f9e: e6 b3 in r30, 0x16 ; 22
ldd greenData,Y+GREEN_MEM_OFFSET; lookup the green membership (2)
fa0: 48 89 ldd r20, Y+16 ; 0x10
ldd blueData,Z+BLUE_MEM_OFFSET ; lookup the blue membership (2)
fa2: 50 a1 ldd r21, Z+32 ; 0x20
and color,greenData ; mask memberships together (1)
fa4: 34 23 and r19, r20
and color,blueData ; to produce the final color (1)
fa6: 35 23 and r19, r21
brts _cleanUpTrackingLine ; if some interrupt routine has (1...not set)
fa8: 76 f0 brts .+28 ; 0xfc6 <_cleanUpTrackingLine>
; come in and set our T flag in
; SREG, then we need to hop out
; and blow away this frames data (common cleanup)
cp color,lastColor ; check to see if the run continues (1)
faa: 32 17 cp r19, r18
breq _acquirePixelBlock ; (2...equal)
fac: a1 f3 breq .-24 ; 0xf96 <_acquirePixelBlock>
; ___________
; 16 clock cycles
; (16 clock cycles = 1 uS = 1 pixelBlock time)
; Toggle the debug line to indicate a color change
sbi _SFR_IO_ADDR(PORTD),PD6
fae: 96 9a sbi 0x12, 6 ; 18
nop
fb0: 00 00 nop
cbi _SFR_IO_ADDR(PORTD),PD6
fb2: 96 98 cbi 0x12, 6 ; 18
mov tmp2,pixelRunStart ; get the count value of the
fb4: 41 2f mov r20, r17
; current pixel run
in pixelCount,_SFR_IO_ADDR(TCNT1L) ; get the current TCNT1 value
fb6: 0c b5 in r16, 0x2c ; 44
mov pixelRunStart,pixelCount ; reload pixelRunStart for the
fb8: 10 2f mov r17, r16
; next run
sub pixelCount,tmp2 ; pixelCount = TCNT1L - pixelRunStart
fba: 04 1b sub r16, r20
st X+,lastColor ; record the color run in the current line buffer
fbc: 2d 93 st X+, r18
st X+,pixelCount ; with its length
fbe: 0d 93 st X+, r16
mov lastColor,color ; set lastColor so we can figure out when it changes
fc0: 23 2f mov r18, r19
nop ; waste one more cycle for a total of 16
fc2: 00 00 nop
rjmp _acquirePixelBlock
fc4: e8 cf rjmp .-48 ; 0xf96 <_acquirePixelBlock>
00000fc6 <_cleanUpTrackingLine>:
; _cleanUpTrackingLine is used to write the last run length block off to the currentLineBuffer so
; that all 176 pixels in the line are accounted for.
_cleanUpTrackingLine:
ldi pixelCount,0xFF ; the length of the last run is ALWAYS 0xFF minus the last
fc6: 0f ef ldi r16, 0xFF ; 255
sub pixelCount,pixelRunStart ; pixelRunStart
fc8: 01 1b sub r16, r17
inc pixelCount ; increment pixelCount since we actually need to account
fca: 03 95 inc r16
; for the overflow of TCNT1
st X+,color ; record the color run in the current line buffer
fcc: 3d 93 st X+, r19
st X,pixelCount
fce: 0c 93 st X, r16
rjmp _cleanUp
fd0: 00 c0 rjmp .+0 ; 0xfd2 <_cleanUp>
00000fd2 <_cleanUp>:
_cleanUpDumpLine:
; NOTE: If serial data is received, to interrupt the tracking of a line, we'll
; get a EV_SERIAL_DATA_RECEIVED event, and the T bit set so we will end the
; line's processing...however, the PCLK will keep on ticking for the rest of
; the frame/line, which will cause the TCNT to eventually overflow and
; interrupt us, generating a EV_ACQUIRE_LINE_COMPLETE event. We don't want
; this, so we need to actually turn off the PCLK counting each time we exit
; this loop, and only turn it on when we begin acquiring lines....
; NOT NEEDED FOR NOW...
;in tmp1, _SFR_IO_ADDR(TIMSK) ; disable TIMER1 to stop counting
;andi tmp1, DISABLE_PCLK_TIMER1_OVERFLOW_BITMASK ; external PCLK pulses
;out _SFR_IO_ADDR(TIMSK),tmp1
_cleanUp:
; Disable the external clocking of the Timer1 counter
in tmp1, _SFR_IO_ADDR(TCCR1B)
fd2: 3e b5 in r19, 0x2e ; 46
andi tmp1, 0xF8
fd4: 38 7f andi r19, 0xF8 ; 248
out _SFR_IO_ADDR(TCCR1B),tmp1
fd6: 3e bd out 0x2e, r19 ; 46
; Toggle the debug line to indicate the line is complete
sbi _SFR_IO_ADDR(PORTD),PD6
fd8: 96 9a sbi 0x12, 6 ; 18
cbi _SFR_IO_ADDR(PORTD),PD6
fda: 96 98 cbi 0x12, 6 ; 18
clt ; clear out the T bit since we have detected
fdc: e8 94 clt
00000fde <_exit>:
; the interruption and are exiting to handle it
_exit:
ret
fde: 08 95 ret
00000fe0 <CamIntAsm_waitForNewDumpFrame>:
;*****************************************************************
; Function Name: CamIntAsm_waitForNewDumpFrame
; Function Description: This function is responsible for
; going to sleep until a new frame begins (indicated by
; VSYNC transitioning from low to high. This will wake
; the "VSYNC sleep" up and allow it to continue with
; acquiring a line of pixel data to dump out to the UI.
; Inputs: r25 - MSB of currentLineBuffer
; r24 - LSB of currentLineBuffer
; r23 - MSB of prevLineBuffer
; r22 - LSB of prevLineBuffer
; Outputs: none
; NOTES: This function doesn't really return...it sorta just
; floats into the acquireDumpLine function after the "VSYNC sleep"
; is awoken.
;*****************************************************************
CamIntAsm_waitForNewDumpFrame:
sbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
fe0: 96 9a sbi 0x12, 6 ; 18
cbi _SFR_IO_ADDR(PORTD),PD6
fe2: 96 98 cbi 0x12, 6 ; 18
sleep
fe4: 88 95 sleep
00000fe6 <CamIntAsm_acquireDumpLine>:
;*****************************************************************
; REMEMBER...everything from here on out is critically timed to be
; synchronized with the flow of pixel data from the camera...
;*****************************************************************
CamIntAsm_acquireDumpLine:
brts _cleanUp
fe6: ae f3 brts .-22 ; 0xfd2 <_cleanUp>
;sbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
;cbi _SFR_IO_ADDR(PORTD),PD6
mov XH,currLineBuffHigh ; Load the pointer to the current line
fe8: b9 2f mov r27, r25
mov XL,currLineBuffLow ; buffer into the X pointer regs
fea: a8 2f mov r26, r24
mov YH,prevLineBuffHigh ; Load the pointer to the previous line
fec: d7 2f mov r29, r23
mov YL,prevLineBuffLow ; buffer into the Y pointer regs
fee: c6 2f mov r28, r22
ldi tmp1,PIXEL_RUN_START_INITIAL ; set up the TCNT1 to overflow (and
ff0: 30 e5 ldi r19, 0x50 ; 80
ldi tmp2,0xFF ; interrupts) after 176 pixels
ff2: 4f ef ldi r20, 0xFF ; 255
out _SFR_IO_ADDR(TCNT1H),tmp2
ff4: 4d bd out 0x2d, r20 ; 45
out _SFR_IO_ADDR(TCNT1L),tmp1
ff6: 3c bd out 0x2c, r19 ; 44
in tmp1, _SFR_IO_ADDR(TCCR1B) ; Enable the PCLK line to actually
ff8: 3e b5 in r19, 0x2e ; 46
ori tmp1, 0x07 ; feed Timer1
ffa: 37 60 ori r19, 0x07 ; 7
out _SFR_IO_ADDR(TCCR1B),tmp1
ffc: 3e bd out 0x2e, r19 ; 46
nop
ffe: 00 00 nop
in tmp1, _SFR_IO_ADDR(TIMSK) ; enable TIMER1 to start counting
1000: 39 b7 in r19, 0x39 ; 57
ori tmp1, ENABLE_PCLK_TIMER1_OVERFLOW_BITMASK ; external PCLK pulses and interrupt on
1002: 34 60 ori r19, 0x04 ; 4
out _SFR_IO_ADDR(TIMSK),tmp1 ; overflow
1004: 39 bf out 0x39, r19 ; 57
in tmp1, _SFR_IO_ADDR(GICR) ; enable the HREF interrupt...remember, we
1006: 3b b7 in r19, 0x3b ; 59
; only use this interrupt to synchronize
; the beginning of the line
ori tmp1, HREF_INTERRUPT_ENABLE_MASK
1008: 30 68 ori r19, 0x80 ; 128
out _SFR_IO_ADDR(GICR), tmp1
100a: 3b bf out 0x3b, r19 ; 59
0000100c <_dumpFrame>:
;*******************************************************************************************
; Dump Frame handler
;*******************************************************************************************
_dumpFrame:
sbi _SFR_IO_ADDR(PORTD),PD6
100c: 96 9a sbi 0x12, 6 ; 18
sleep ; ...And we wait...
100e: 88 95 sleep
cbi _SFR_IO_ADDR(PORTD),PD6
1010: 96 98 cbi 0x12, 6 ; 18
in tmp1, _SFR_IO_ADDR(GICR) ; disable the HREF interrupt
1012: 3b b7 in r19, 0x3b ; 59
andi tmp1, HREF_INTERRUPT_DISABLE_MASK ; so we don't get interrupted
1014: 3f 77 andi r19, 0x7F ; 127
out _SFR_IO_ADDR(GICR), tmp1 ; while dumping the line
1016: 3b bf out 0x3b, r19 ; 59
...
0000101a <_sampleDumpPixel>:
nop ; Remember...if we ever remove the "cbi" instruction above,
; we need to add two more NOPs to cover this
; Ok...the following loop needs to run in 8 clock cycles, so we can get every
; pixel in the line...this shouldn't be a problem, since the PCLK timing was
; reduced by a factor of 2 whenever we go to dump a line (this is to give us
; enough time to do the sampling and storing of the pixel data). In addition,
; it is assumed that we will have to do some minor processing on the data right
; before we send it out, like mask off the top 4-bits of each, and then pack both
; low nibbles into a single byte for transmission...we just don't have time to
; do that here (only 8 instruction cycles :-) )
_sampleDumpPixel:
in tmp1,G_PORT ; sample the G value (1)
101a: 33 b3 in r19, 0x13 ; 19
in tmp2,RB_PORT ; sample the R/B value (1)
101c: 46 b3 in r20, 0x16 ; 22
st X+,tmp1 ; store to the currLineBuff and inc ptrs(2)
101e: 3d 93 st X+, r19
st Y+,tmp2 ; store to the prevLineBuff and inc ptrs(2)
1020: 49 93 st Y+, r20
brtc _sampleDumpPixel ; loop back unless flag is set (2...if not set)
1022: de f7 brtc .-10 ; 0x101a <_sampleDumpPixel>
; ___________
; 8 cycles normally
; if we make it here, it means the T flag is set, and we must have been interrupted
; so we need to exit (what if we were interrupted for serial? should we disable it?)
rjmp _cleanUpDumpLine
1024: d6 cf rjmp .-84 ; 0xfd2 <_cleanUp>
00001026 <__vector_1>:
;***********************************************************
; Function Name: <interrupt handler for External Interrupt0>
; Function Description: This function is responsible
; for handling a rising edge on the Ext Interrupt 0. This
; routine simply returns, since we just want to wake up
; whenever the VSYNC transitions (meaning the start of a new
; frame).
; Inputs: none
; Outputs: none
;***********************************************************
SIG_INTERRUPT0:
; This will wake us up when VSYNC transitions high...we just want to return
reti
1026: 18 95 reti
00001028 <__vector_2>:
;***********************************************************
; Function Name: <interrupt handler for External Interrupt1>
; Function Description: This function is responsible
; for handling a falling edge on the Ext Interrupt 1. This
; routine simply returns, since we just want to wake up
; whenever the HREF transitions (meaning the pixels
; are starting after VSYNC transitioned, and we need to
; start acquiring the pixel blocks
; Inputs: none
; Outputs: none
;***********************************************************
SIG_INTERRUPT1:
; This will wake us up when HREF transitions high...we just want to return
reti
1028: 18 95 reti
0000102a <__vector_8>:
;***********************************************************
; Function Name: <interrupt handler for Timer0 overflow>
; Function Description: This function is responsible
; for handling the Timer0 overflow (hooked up to indicate
; when we have reached the number of HREFs required in a
; single frame). We set the T flag in the SREG to
; indicate to the _acquirePixelBlock routine that it needs
; to exit, and then set the appropriate action to take in
; the eventList of the Executive module.
; Inputs: none
; Outputs: none
; Note: Originally, the HREF pulses were also going to
; be counted by a hardware counter, but it didn't end up
; being necessary
;***********************************************************
;SIG_OVERFLOW0:
; set ; set the T bit in SREG
; lds tmp1,eventBitmask
; ori tmp1,EV_ACQUIRE_FRAME_COMPLETE
; sts eventBitmask,tmp1
; reti
;***********************************************************
; Function Name: <interrupt handler for Timer1 overflow>
; Function Description: This function is responsible
; for handling the Timer1 overflow (hooked up to indicate
; when we have reached the end of a line of pixel data,
; since PCLK is hooked up to overflow TCNT1 after 176
; pixels). This routine generates an acquire line complete
; event in the fastEventBitmask, which is streamlined for
; efficiency reasons.
;***********************************************************
SIG_OVERFLOW1:
lds tmp1,fastEventBitmask ; set a flag indicating
102a: 30 91 72 00 lds r19, 0x0072
ori tmp1,FEV_ACQUIRE_LINE_COMPLETE ; a line is complete
102e: 31 60 ori r19, 0x01 ; 1
sts fastEventBitmask,tmp1
1030: 30 93 72 00 sts 0x0072, r19
set ; set the T bit in SREG
1034: 68 94 set
;sbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
;cbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
reti
1036: 18 95 reti
00001038 <__vector_default>:
; This is the default handler for all interrupts that don't
; have handler routines specified for them.
.global __vector_default
__vector_default:
reti
1038: 18 95 reti
0000103a <atoi>:
103a: fc 01 movw r30, r24
103c: 88 27 eor r24, r24
103e: 99 27 eor r25, r25
1040: e8 94 clt
1042: 21 91 ld r18, Z+
1044: 22 23 and r18, r18
1046: e9 f0 breq .+58 ; 0x1082 <atoi+0x48>
1048: 20 32 cpi r18, 0x20 ; 32
104a: d9 f3 breq .-10 ; 0x1042 <atoi+0x8>
104c: 29 30 cpi r18, 0x09 ; 9
104e: c9 f3 breq .-14 ; 0x1042 <atoi+0x8>
1050: 2a 30 cpi r18, 0x0A ; 10
1052: b9 f3 breq .-18 ; 0x1042 <atoi+0x8>
1054: 2c 30 cpi r18, 0x0C ; 12
1056: a9 f3 breq .-22 ; 0x1042 <atoi+0x8>
1058: 2d 30 cpi r18, 0x0D ; 13
105a: 99 f3 breq .-26 ; 0x1042 <atoi+0x8>
105c: 26 37 cpi r18, 0x76 ; 118
105e: 89 f3 breq .-30 ; 0x1042 <atoi+0x8>
1060: 2b 32 cpi r18, 0x2B ; 43
1062: 19 f0 breq .+6 ; 0x106a <atoi+0x30>
1064: 2d 32 cpi r18, 0x2D ; 45
1066: 21 f4 brne .+8 ; 0x1070 <atoi+0x36>
1068: 68 94 set
106a: 21 91 ld r18, Z+
106c: 22 23 and r18, r18
106e: 49 f0 breq .+18 ; 0x1082 <atoi+0x48>
1070: 20 33 cpi r18, 0x30 ; 48
1072: 3c f0 brlt .+14 ; 0x1082 <atoi+0x48>
1074: 2a 33 cpi r18, 0x3A ; 58
1076: 2c f4 brge .+10 ; 0x1082 <atoi+0x48>
1078: 20 53 subi r18, 0x30 ; 48
107a: 0b d0 rcall .+22 ; 0x1092 <__mulhi_const_10>
107c: 82 0f add r24, r18
107e: 91 1d adc r25, r1
1080: f4 cf rjmp .-24 ; 0x106a <atoi+0x30>
1082: 81 15 cp r24, r1
1084: 91 05 cpc r25, r1
1086: 21 f0 breq .+8 ; 0x1090 <atoi+0x56>
1088: 1e f4 brtc .+6 ; 0x1090 <atoi+0x56>
108a: 80 95 com r24
108c: 90 95 com r25
108e: 01 96 adiw r24, 0x01 ; 1
1090: 08 95 ret
00001092 <__mulhi_const_10>:
1092: 7a e0 ldi r23, 0x0A ; 10
1094: 97 9f mul r25, r23
1096: 90 2d mov r25, r0
1098: 87 9f mul r24, r23
109a: 80 2d mov r24, r0
109c: 91 0d add r25, r1
109e: 11 24 eor r1, r1
10a0: 08 95 ret
000010a2 <__eeprom_read_byte_1C1D1E>:
10a2: e1 99 sbic 0x1c, 1 ; 28
10a4: fe cf rjmp .-4 ; 0x10a2 <__eeprom_read_byte_1C1D1E>
10a6: bf bb out 0x1f, r27 ; 31
10a8: ae bb out 0x1e, r26 ; 30
10aa: e0 9a sbi 0x1c, 0 ; 28
10ac: 11 96 adiw r26, 0x01 ; 1
10ae: 0d b2 in r0, 0x1d ; 29
10b0: 08 95 ret
000010b2 <__eeprom_read_block_1C1D1E>:
10b2: f7 df rcall .-18 ; 0x10a2 <__eeprom_read_byte_1C1D1E>
10b4: 01 92 st Z+, r0
10b6: 1a 94 dec r1
10b8: e1 f7 brne .-8 ; 0x10b2 <__eeprom_read_block_1C1D1E>
10ba: 08 95 ret
000010bc <__eeprom_write_byte_1C1D1E>:
10bc: e1 99 sbic 0x1c, 1 ; 28
10be: fe cf rjmp .-4 ; 0x10bc <__eeprom_write_byte_1C1D1E>
10c0: bf bb out 0x1f, r27 ; 31
10c2: ae bb out 0x1e, r26 ; 30
10c4: 0d ba out 0x1d, r0 ; 29
10c6: 11 96 adiw r26, 0x01 ; 1
10c8: 0f b6 in r0, 0x3f ; 63
10ca: f8 94 cli
10cc: e2 9a sbi 0x1c, 2 ; 28
10ce: e1 9a sbi 0x1c, 1 ; 28
10d0: 0f be out 0x3f, r0 ; 63
10d2: 08 95 ret
000010d4 <_exit>:
10d4: ff cf rjmp .-2 ; 0x10d4 <_exit>