?lang_form? ?lang_select? ?lang_submit? ?lang_endform?

library

?curdirlinks? - Rev 6

?prevdifflink?

<!DOCTYPE <h <t <link </head><body> <!-- <div <div <a <h 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00035 <a 00037 { 00038 ax88796Init(); 00039 } 00040 <a 00042 { 00043 00044 00045 00046 } 00047 <a 00049 { 00050 00051 00052 00053 00054 00055 00056 00057 00058 00059 00060 { 00061 00062 00063 } 00064 00065 00066 00067 00068 00069 00070 } 00071 00072 00073 { 00074 u08 tempCR; 00075 00076 00077 00078 00079 00080 00081 00082 00083 00084 00085 00086 00087 } 00088 00089 00090 { 00091 u08 tempCR; 00092 00093 00094 00095 00096 00097 00098 00099 00100 00101 00102 00103 00104 } 00105 <a 00107 { 00108 00109 } 00110 00111 00112 00113 { 00114 00115 00116 sbi(MCUCR, SRE); 00117 00118 00119 00120 00121 00122 00123 00124 00125 00126 00127 00128 00129 00130 00131 00132 00133 00134 00135 00136 00137 00138 } 00139 00140 00141 00142 00143 { 00144 00145 } 00146 00147 00148 { 00149 00150 00151 00152 00153 00154 00155 00156 00157 00158 nop(); 00159 nop(); 00160 00161 00162 00163 00164 00165 } 00166 00167 00168 00169 00170 00171 { 00172 00173 } 00174 00175 00176 { 00177 u08 data; 00178 00179 00180 00181 00182 00183 00184 nop(); 00185 nop(); 00186 00187 00188 00189 00190 00191 00192 00193 } 00194 00195 00196 00197 00198 { 00199 00200 00201 00202 00203 00204 00205 00206 delay_ms(100); 00207 00208 00209 00210 00211 delay_ms(50); 00212 00213 00214 00215 00216 00217 00218 delay_ms(255); 00219 00220 00221 00222 00223 00224 00225 00226 00227 00228 00229 00230 00231 00232 00233 00234 00235 00236 00237 00238 00239 00240 00241 00242 00243 00244 00245 00246 00247 00248 00249 00250 00251 00252 00253 00254 00255 00256 00257 00258 00259 00260 00261 00262 00263 00264 00265 00266 00267 00268 00269 00270 00271 00272 00273 00274 } 00275 00276 00277 00278 { 00279 00280 00281 00282 00283 00284 00285 00286 00287 00288 00289 00290 00291 00292 00293 00294 00295 00296 00297 00298 00299 00300 00301 00302 00303 00304 00305 00306 00307 00308 } 00309 00310 00311 00312 { 00313 00314 00315 00316 00317 } 00318 00319 00320 00321 { 00322 00323 00324 00325 00326 00327 } 00328 00329 00330 00331 { 00332 00333 00334 00335 00336 00337 00338 00339 00340 00341 00342 00343 00344 00345 00346 00347 00348 00349 00350 00351 00352 00353 00354 00355 00356 { 00357 00358 } 00359 00360 00361 00362 00363 00364 00365 00366 { 00367 00368 00369 00370 00371 00372 00373 00374 } 00375 00376 00377 00378 00379 00380 00381 00382 00383 00384 00385 00386 00387 00388 00389 00390 00391 00392 00393 00394 00395 00396 00397 00398 00399 { 00400 00401 00402 00403 } 00404 00405 00406 } 00407 00408 00409 00410 { 00411 00412 00413 00414 00415 00416 00417 00418 00419 00420 00421 00422 00423 00424 00425 00426 00427 00428 00429 00430 00431 00432 } 00433 00434 00435 00436 { 00437 00438 00439 00440 00441 00442 00443 00444 00445 00446 00447 00448 00449 00450 00451 00452 00453 } 00454 00455 00456 00457 { 00458 00459 00460 00461 00462 00463 } 00464 00465 00466 00467 { 00468 00469 00470 00471 00472 00473 00474 00475 00476 00477 00478 00479 delay_ms(2); 00480 00481 00482 00483 00484 00485 00486 { 00487 00488 00489 00490 00491 00492 00493 } 00494 00495 00496 00497 00498 00499 00500 00501 00502 00503 00504 00505 00506 00507 00508 00509 00510 00511 00512 00513 00514 00515 00516 } 00517 00518 00519 00520 00521 00522 00523 00524 00525 00526 00527 00528 00529 00530 00531 00532 00533 00534 00535 00536 00537 00538 00539 00540 00541 00542 00543 00544 00545 00546 { 00547 00548 00549 00550 mii_write; 00551 00552 mask8 = 0x10; 00553 00554 { 00555 00556 set_mdo; 00557 00558 clr_mdo; 00559 mii_clk; 00560 00561 } 00562 mask8 = 0x10; 00563 00564 { 00565 00566 set_mdo; 00567 00568 clr_mdo; 00569 mii_clk; 00570 00571 } 00572 mii_w_ta; 00573 00574 mask16 = 0x8000; 00575 00576 { 00577 00578 set_mdo; 00579 00580 clr_mdo; 00581 00582 00583 } 00584 } 00585 00586 00587 { 00588 00589 00590 00591 mii_read; 00592 00593 mask8 = 0x10; 00594 00595 { 00596 00597 set_mdo; 00598 00599 clr_mdo; 00600 00601 00602 } 00603 mask8 = 0x10; 00604 00605 { 00606 00607 set_mdo; 00608 00609 clr_mdo; 00610 mii_clk; 00611 00612 } 00613 00614 mii_r_ta; 00615 00616 mask16 = 0x8000; 00617 00618 00619 { 00620 mii_clk; 00621 00622 { 00623 00624 } 00625 00626 { 00627 00628 00629 } 00630 00631 } 00632 00633 } 00634 00635 00636 00637 { 00638 00639 00640 00641 00642 00643 00644 00645 00646 00647 00648 00649 00650 00651 00652 00653 00654 00655 00656 00657 00658 00659 00660 00661 00662 00663 00664 00665 00666 00667 00668 00669 00670 00671 00672 00673 00674 00675 00676 00677 00678 00679 00680 00681 00682 00683 00684 00685 00686 00687 00688 00689 00690 00691 00692 00693 00694 00695 delay_ms(25); 00696 } 00697 00698 00699 00700 00701 00702 00703 00704 00705 00706 00707 00708 00709 00710 00711 00712 00713 00714 00715 00716 </ <a <img </body> </html>

HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> tml><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"> itle>Procyon AVRlib: net/ax88796.c Source File</title> href="dox.css" rel="stylesheet" type="text/css"> Generated by Doxygen 1.4.2 --> class="qindex"><a class="qindex" href="main.html">Main Page</a> | <a class="qindex" href="modules.html">Modules</a> | <a class="qindex" href="annotated.html">Data Structures</a> | <a class="qindex" href="dirs.html">Directories</a> | <a class="qindex" href="files.html">File List</a> | <a class="qindex" href="functions.html">Data Fields</a> | <a class="qindex" href="globals.html">Globals</a> | <a class="qindex" href="pages.html">Related Pages</a></div> class="nav"> class="el" href="dir_000001.html">net</a></div> 1>ax88796.c</h1><a href="ax88796_8c.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment">00001 /*! \file ax88796.c \brief ASIX AX88796 Ethernet Interface Driver. */ //***************************************************************************** // // File Name : 'ax88796.c' // Title : ASIX AX88796 Ethernet Interface Driver // Author : Pascal Stang // Created : 10/22/2002 // Revised : 8/21/2005 // Version : 0.1 // Target MCU : Atmel AVR series // Editor Tabs : 4 // // Description : This driver provides initialization and transmit/receive // functions for the ASIX AX88796 10/100Mb Ethernet Controller and PHY. // // Based in part on code by Louis Beaudoin (www.embedded-creations.com). // Thanks to Adam Dunkels and Louis Beaudoin for providing the initial // structure in which to write this driver. // //***************************************************************************** #include "<a class="code" href="global_8h.html">global.h</a>" #include "<a class="code" href="timer_8h.html">timer.h</a>" #include "<a class="code" href="rprintf_8h.html">rprintf.h</a>" #include "<a class="code" href="ax88796_8h.html">ax88796.h</a>" // include configuration #include "<a class="code" href="ax88796conf_8h.html">ax88796conf.h</a>" // pointers to locations in the ax88796 receive buffer static unsigned char NextPage; // page pointer to next Rx packet static unsigned int CurrentRetreiveAddress; // DMA address for read Rx packet location name="l00036"></a><a class="code" href="group__nic.html#ga0">00036</a> void <a class="code" href="group__nic.html#ga0">nicInit</a>(void) name="l00041"></a><a class="code" href="group__nic.html#ga1">00041</a> void <a class="code" href="group__nic.html#ga1">nicSend</a>(unsigned int len, unsigned char* packet) ax88796BeginPacketSend(len); ax88796SendPacketData(packet, len); ax88796EndPacketSend(); name="l00048"></a><a class="code" href="group__nic.html#ga2">00048</a> unsigned int <a class="code" href="group__nic.html#ga2">nicPoll</a>(unsigned int maxlen, unsigned char* packet) unsigned int packetLength; packetLength = ax88796BeginPacketRetreive(); // if there's no packet or an error - exit without ending the operation if( !packetLength ) return 0; // drop anything too big for the buffer if( packetLength > maxlen ) ax88796EndPacketRetreive(); return 0; // copy the packet data into the uIP packet buffer ax88796RetreivePacketData( packet, packetLength ); ax88796EndPacketRetreive(); return packetLength; void nicGetMacAddress(u08* macaddr) // switch register pages tempCR = ax88796Read(CR); ax88796Write(CR,tempCR|PS0); // read MAC address registers *macaddr++ = ax88796Read(PAR0); *macaddr++ = ax88796Read(PAR1); *macaddr++ = ax88796Read(PAR2); *macaddr++ = ax88796Read(PAR3); *macaddr++ = ax88796Read(PAR4); *macaddr++ = ax88796Read(PAR5); // switch register pages back ax88796Write(CR,tempCR); void nicSetMacAddress(u08* macaddr) // switch register pages tempCR = ax88796Read(CR); ax88796Write(CR,tempCR|PS0); // write MAC address registers ax88796Write(PAR0, *macaddr++); ax88796Write(PAR1, *macaddr++); ax88796Write(PAR2, *macaddr++); ax88796Write(PAR3, *macaddr++); ax88796Write(PAR4, *macaddr++); ax88796Write(PAR5, *macaddr++); // switch register pages back ax88796Write(CR,tempCR); name="l00106"></a><a class="code" href="group__nic.html#ga5">00106</a> void <a class="code" href="group__nic.html#ga5">nicRegDump</a>(void) ax88796RegDump(); void ax88796SetupPorts(void) #if NIC_CONNECTION == MEMORY_MAPPED // enable external SRAM interface - no wait states // sbi(MCUCR, SRW10); // sbi(XMCRA, SRW00); // sbi(XMCRA, SRW01); // sbi(XMCRA, SRW11); #else // set address port to output AX88796_ADDRESS_DDR = AX88796_ADDRESS_MASK; // set data port to input with pull-ups AX88796_DATA_DDR = 0x00; AX88796_DATA_PORT = 0xFF; // initialize the control port read and write pins to de-asserted sbi( AX88796_CONTROL_PORT, AX88796_CONTROL_READPIN ); sbi( AX88796_CONTROL_PORT, AX88796_CONTROL_WRITEPIN ); // set the read and write pins to output sbi( AX88796_CONTROL_DDR, AX88796_CONTROL_READPIN ); sbi( AX88796_CONTROL_DDR, AX88796_CONTROL_WRITEPIN ); #endif // set reset pin to output sbi( AX88796_RESET_DDR, AX88796_RESET_PIN ); #if NIC_CONNECTION == MEMORY_MAPPED inline void ax88796Write(u08 address, u08 data) *(volatile u08*)(AX88796_MEMORY_MAPPED_OFFSET + address) = data; #else void ax88796Write(u08 address, u08 data) // assert the address AX88796_ADDRESS_PORT = address | (AX88796_ADDRESS_PORT&~AX88796_ADDRESS_MASK); // set data bus as output and place data on bus AX88796_DATA_DDR = 0xFF; AX88796_DATA_PORT = data; // clock write pin cbi(AX88796_CONTROL_PORT, AX88796_CONTROL_WRITEPIN); sbi(AX88796_CONTROL_PORT, AX88796_CONTROL_WRITEPIN); // set data bus back to input with pullups enabled AX88796_DATA_DDR = 0x00; AX88796_DATA_PORT = 0xFF; #endif #if NIC_CONNECTION == MEMORY_MAPPED inline u08 ax88796Read(u08 address) return *(volatile u08*)(AX88796_MEMORY_MAPPED_OFFSET + address); #else u08 ax88796Read(u08 address) // assert the address AX88796_ADDRESS_PORT = address | (AX88796_ADDRESS_PORT&~AX88796_ADDRESS_MASK); // assert read cbi(AX88796_CONTROL_PORT, AX88796_CONTROL_READPIN); // read in the data data = AX88796_DATA_PIN; // negate read sbi(AX88796_CONTROL_PORT, AX88796_CONTROL_READPIN); return data; #endif void ax88796Init(void) unsigned char tcrFduFlag; // initialize I/O ports ax88796SetupPorts(); // do a hard reset sbi(AX88796_RESET_PORT, AX88796_RESET_PIN); cbi(AX88796_RESET_PORT, AX88796_RESET_PIN); // do soft reset ax88796Write(ISR, ax88796Read(ISR)); // wait for PHY to come out of reset ax88796Read(RSTPORT); while(ax88796Read(TR) & RST_B); ax88796WriteMii(0x10,0x00,0x0800); ax88796WriteMii(0x10,0x00,0x1200); ax88796Write(CR,(RD2|STOP)); // stop the NIC, abort DMA, page 0 delay_ms(5); // make sure nothing is coming in or going out ax88796Write(DCR,DCR_INIT); ax88796Write(RBCR0,0x00); ax88796Write(RBCR1,0x00); ax88796Write(IMR,0x00); ax88796Write(ISR,0xFF); ax88796Write(RCR,0x20); ax88796Write(BNRY,RXSTART_INIT); ax88796Write(PSTART,RXSTART_INIT); ax88796Write(PSTOP,RXSTOP_INIT); // switch to page 1 ax88796Write(CR,(PS0|RD2|STOP)); // write mac address ax88796Write(PAR0+0, AX88796_MAC0); ax88796Write(PAR0+1, AX88796_MAC1); ax88796Write(PAR0+2, AX88796_MAC2); ax88796Write(PAR0+3, AX88796_MAC3); ax88796Write(PAR0+4, AX88796_MAC4); ax88796Write(PAR0+5, AX88796_MAC5); // set start point ax88796Write(CURR,RXSTART_INIT+1); ax88796Write(CR,(RD2|START)); ax88796Write(RCR,RCR_INIT); if(ax88796Read(GPI) & I_SPD) // check PHY speed setting tcrFduFlag = FDU; // if 100base, do full duplex else tcrFduFlag = 0; // if 10base, do half duplex ax88796Write(TCR,(tcrFduFlag|TCR_INIT)); ax88796Write(GPOC,MPSEL); // select media interface ax88796Write(TPSR,TXSTART_INIT); ax88796Write(CR,(RD2|STOP)); ax88796Write(DCR,DCR_INIT); ax88796Write(CR,(RD2|START)); ax88796Write(ISR,0xFF); ax88796Write(IMR,IMR_INIT); ax88796Write(TCR,(tcrFduFlag|TCR_INIT)); //test /* while(1) { vt100SetCursorPos(18,0); ax88796RegDump(); } */ void ax88796BeginPacketSend(unsigned int packetLength) unsigned int sendPacketLength; sendPacketLength = (packetLength>=ETHERNET_MIN_PACKET_LENGTH)? (packetLength):(ETHERNET_MIN_PACKET_LENGTH); //start the NIC ax88796Write(CR,(RD2|START)); // still transmitting a packet - wait for it to finish while( ax88796Read(CR) & TXP ); //load beginning page for transmit buffer ax88796Write(TPSR,TXSTART_INIT); //set start address for remote DMA operation ax88796Write(RSAR0,0x00); ax88796Write(RSAR1,0x40); //clear the packet stored interrupt ax88796Write(ISR, PTX); //load data byte count for remote DMA ax88796Write(RBCR0, (unsigned char)(packetLength)); ax88796Write(RBCR1, (unsigned char)(packetLength>>8)); ax88796Write(TBCR0, (unsigned char)(sendPacketLength)); ax88796Write(TBCR1, (unsigned char)((sendPacketLength)>>8)); //do remote write operation ax88796Write(CR,0x12); void ax88796SendPacketData(unsigned char * localBuffer, unsigned int length) unsigned int i; for(i=0;i<length;i++) ax88796Write(RDMAPORT, localBuffer[i]); void ax88796EndPacketSend(void) //send the contents of the transmit buffer onto the network ax88796Write(CR,(RD2|TXP)); // clear the remote DMA interrupt ax88796Write(ISR, RDC); unsigned int ax88796BeginPacketRetreive(void) unsigned char writePagePtr; unsigned char readPagePtr; unsigned char bnryPagePtr; unsigned char i; unsigned char pageheader[4]; unsigned int rxlen; // check for and handle an overflow ax88796ProcessInterrupt(); // read CURR from page 1 ax88796Write(CR,(PS0|RD2|START)); writePagePtr = ax88796Read(CURR); // read the boundary register from page 0 ax88796Write(CR,(RD2|START)); bnryPagePtr = ax88796Read(BNRY); // first packet is at page bnryPtr+1 readPagePtr = bnryPagePtr+1; if(readPagePtr >= RXSTOP_INIT) readPagePtr = RXSTART_INIT; // return if there is no packet in the buffer if( readPagePtr == writePagePtr ) return 0; // clear the packet received interrupt flag ax88796Write(ISR, PRX); // if the boundary pointer is invalid, // reset the contents of the buffer and exit if( (bnryPagePtr < RXSTART_INIT) || (bnryPagePtr >= RXSTOP_INIT) ) ax88796Write(BNRY, RXSTART_INIT); ax88796Write(CR, (PS0|RD2|START)); ax88796Write(CURR, RXSTART_INIT+1); ax88796Write(CR, (RD2|START)); // rprintf("B"); return 0; // initiate DMA to transfer the RTL8019 packet header ax88796Write(RBCR0, 4); ax88796Write(RBCR1, 0); ax88796Write(RSAR0, 0); ax88796Write(RSAR1, readPagePtr); ax88796Write(CR, (RD0|START)); for(i=0;i<4;i++) pageheader[i] = ax88796Read(RDMAPORT); // end the DMA operation ax88796Write(CR, (RD2|START)); for(i = 0; i <= 20; i++) if(ax88796Read(ISR) & RDC) break; ax88796Write(ISR, RDC); rxlen = (pageheader[PKTHEADER_PKTLENH]<<8) + pageheader[PKTHEADER_PKTLENL]; NextPage = pageheader[PKTHEADER_NEXTPAGE]; CurrentRetreiveAddress = (readPagePtr<<8) + 4; // if the NextPage pointer is invalid, the packet is not ready yet - exit if( (NextPage >= RXSTOP_INIT) || (NextPage < RXSTART_INIT) ) // rprintf("N"); // rprintfu08(nextPage); return 0; return rxlen-4; void ax88796RetreivePacketData(unsigned char * localBuffer, unsigned int length) unsigned int i; // initiate DMA to transfer the data ax88796Write(RBCR0, (unsigned char)length); ax88796Write(RBCR1, (unsigned char)(length>>8)); ax88796Write(RSAR0, (unsigned char)CurrentRetreiveAddress); ax88796Write(RSAR1, (unsigned char)(CurrentRetreiveAddress>>8)); ax88796Write(CR, (RD0|START)); for(i=0;i<length;i++) localBuffer[i] = ax88796Read(RDMAPORT); // end the DMA operation ax88796Write(CR, (RD2|START)); for(i = 0; i <= 20; i++) if(ax88796Read(ISR) & RDC) break; ax88796Write(ISR, RDC); CurrentRetreiveAddress += length; if( CurrentRetreiveAddress >= 0x6000 ) CurrentRetreiveAddress -= (0x6000-0x4600) ; void ax88796EndPacketRetreive(void) unsigned char i; unsigned char bnryPagePtr; // end the DMA operation ax88796Write(CR, (RD2|START)); for(i = 0; i <= 20; i++) if(ax88796Read(ISR) & RDC) break; ax88796Write(ISR, RDC); // set the boundary register to point // to the start of the next packet-1 bnryPagePtr = NextPage-1; if(bnryPagePtr < RXSTART_INIT) bnryPagePtr = RXSTOP_INIT-1; ax88796Write(BNRY, bnryPagePtr); void ax88796ProcessInterrupt(void) unsigned char intr = ax88796Read(ISR); // check for receive overflow if( intr & OVW ) ax88796ReceiveOverflowRecover(); void ax88796ReceiveOverflowRecover(void) // receive buffer overflow handling procedure // as specified in the AX88796 datasheet unsigned char cmdReg; unsigned char resend=0; // check if we were transmitting something cmdReg = ax88796Read(CR); // stop the interface ax88796Write(CR, (RD2|STOP)); // wait for timeout // clear remote byte count registers ax88796Write(RBCR0, 0x00); ax88796Write(RBCR1, 0x00); // if we were transmitting something if(cmdReg & TXP) // check if the transmit completed cmdReg = ax88796Read(ISR); if((cmdReg & PTX) || (cmdReg & TXE)) resend = 0; // transmit completed else resend = 1; // transmit was interrupted, must resend // switch to loopback mode ax88796Write(TCR, LB0); // start the interface ax88796Write(CR, (RD2|START)); // set boundary ax88796Write(BNRY, RXSTART_INIT); // go to page 1 ax88796Write(CR, (PS0|RD2|START)); // set current page register ax88796Write(CPR, RXSTART_INIT+1); // go to page 0 ax88796Write(CR, (RD2|START)); // clear the overflow int ax88796Write(ISR, OVW); // switch to normal (non-loopback mode) ax88796Write(TCR, TCR_INIT); // if previous transmit was interrupted, then resend if(resend) ax88796Write(CR, (RD2|TXP|START)); // recovery completed #define set_mdc ax88796Write(MEMR,ax88796Read(MEMR)|0x01); #define clr_mdc ax88796Write(MEMR,ax88796Read(MEMR)&0xFE); #define mii_clk set_mdc; clr_mdc; #define set_mdir ax88796Write(MEMR,ax88796Read(MEMR)|0x02); #define clr_mdir ax88796Write(MEMR,ax88796Read(MEMR)&0xFD); #define set_mdo ax88796Write(MEMR,ax88796Read(MEMR)|0x08) #define clr_mdo ax88796Write(MEMR,ax88796Read(MEMR)&0xF7) #define mii_write clr_mdo; mii_clk; \ set_mdo; mii_clk; \ clr_mdo; mii_clk; \ set_mdo; mii_clk; #define mii_read clr_mdo; mii_clk; \ set_mdo; mii_clk; \ set_mdo; mii_clk; \ clr_mdo; mii_clk; #define mii_r_ta mii_clk; \ #define mii_w_ta set_mdo; mii_clk; \ clr_mdo; mii_clk; void ax88796WriteMii(unsigned char phyad,unsigned char regad,unsigned int mii_data) unsigned char mask8; unsigned int i,mask16; for(i=0;i<5;++i) if(mask8 & phyad) else mask8 >>= 1; for(i=0;i<5;++i) if(mask8 & regad) else mask8 >>= 1; for(i=0;i<16;++i) if(mask16 & mii_data) else mii_clk; mask16 >>= 1; unsigned int ax88796ReadMii(unsigned char phyad,unsigned char regad) unsigned char mask8,i; unsigned int mask16,result16; for(i=0;i<5;++i) if(mask8 & phyad) else mii_clk; mask8 >>= 1; for(i=0;i<5;++i) if(mask8 & regad) else mask8 >>= 1; result16 = 0x0000; for(i=0;i<16;++i) if(ax88796Read(MEMR) & 0x04) result16 |= mask16; else asm volatile ("nop"); break; mask16 >>= 1; return result16; void ax88796RegDump(void) unsigned char result; result = ax88796Read(TR); rprintf("Media State: "); if(!(result & AUTOD)) rprintf("Autonegotiation\r\n"); else if(result & RST_B) rprintf("PHY in Reset \r\n"); else if(!(result & RST_10B)) rprintf("10BASE-T \r\n"); else if(!(result & RST_TXB)) rprintf("100BASE-T \r\n"); //rprintf("TR regsiter : %x\r\n",result); //result = read_mii(0x10,0); //rprintf("MII regsiter 0x10: %x\r\n",result); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>("Page0: CR BNRY PSR PST ISR TSR RSR MMR TR GPI\r\n"); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(CR)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(BNRY)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(PSTART)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(PSTOP)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(ISR)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(TSR)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(RSR)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(MEMR)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(TR)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(GPI)); <a class="code" href="group__rprintf.html#ga5">rprintfCRLF</a>(); ax88796Write(CR,ax88796Read(CR)|PS0); rprintf("Page1: CR PAR CPR\r\n"); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(CR)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR0)); <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR1)); <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR2)); <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR3)); <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR4)); <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR5)); <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(" "); <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(CPR)); ax88796Write(CR,ax88796Read(CR)&~PS0); /* unsigned char ax88796ReceiveEmpty(void) { unsigned char temp; // read CPR from page 1 ax88796Write(CR,0x62); temp = ax88796Read(CPR); // return to page 0 ax88796Write(CR,0x22); return ( ax88796Read(BNRY) == temp ); }*/ pre></div><hr size="1"><address style="align: right;">Generated on Sun Oct 29 03:41:07 2006 for Procyon AVRlib by  href="http://www.doxygen.org/index.html"> src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.2 </address>

END}