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<h1>ax88796conf_easyethavrasix.h</h1><div class="fragment"><pre class="fragment">00001 <span class="comment">/*! \file ax88796conf.h \brief ASIX AX88796 Ethernet Interface Driver Configuration. */</span>
00002 <span class="comment">//*****************************************************************************</span>
00003 <span class="comment">//</span>
00004 <span class="comment">// File Name : 'ax88796conf.h'</span>
00005 <span class="comment">// Title : ASIX AX88796 Ethernet Interface Driver Configuration</span>
00006 <span class="comment">// Author : Pascal Stang</span>
00007 <span class="comment">// Created : 10/22/2002</span>
00008 <span class="comment">// Revised : 8/22/2005</span>
00009 <span class="comment">// Version : 0.1</span>
00010 <span class="comment">// Target MCU : Atmel AVR series</span>
00011 <span class="comment">// Editor Tabs : 4</span>
00012 <span class="comment">//</span>
00013 <span class="comment">// Description : This driver provides initialization and transmit/receive</span>
00014 <span class="comment">// functions for the ASIX AX88796 10/100Mb Ethernet Controller and PHY.</span>
00015 <span class="comment">//</span>
00016 <span class="comment">// This code is distributed under the GNU Public License</span>
00017 <span class="comment">// which can be found at http://www.gnu.org/licenses/gpl.txt</span>
00018 <span class="comment">//</span>
00019 <span class="comment">//*****************************************************************************</span>
00020
00021 <span class="preprocessor">#ifndef AX88796CONF_H</span>
00022 <span class="preprocessor"></span><span class="preprocessor">#define AX88796CONF_H</span>
00023 <span class="preprocessor"></span>
00024 <span class="comment">// This driver supports an AX88796 connected in memory-mapped or direct I/O mode.</span>
00025 <span class="comment">//</span>
00026 <span class="preprocessor">#define GENERAL_IO 0</span>
00027 <span class="preprocessor"></span><span class="comment">// Direct I/O mode assumes the AX88796 address, data, and control lines are</span>
00028 <span class="comment">// connected directly to processor I/O pins. The memory-bus accesses are</span>
00029 <span class="comment">// software emulated.</span>
00030 <span class="comment">//</span>
00031 <span class="preprocessor">#define MEMORY_MAPPED 1</span>
00032 <span class="preprocessor"></span><span class="comment">// Memory-mapped mode assumes that the AX88796 is connected the processor via</span>
00033 <span class="comment">// the external memory bus, and that the AX88796 address space starts at the</span>
00034 <span class="comment">// memory location AX88796_MEMORY_MAPPED_OFFSET.</span>
00035 <span class="comment">//</span>
00036 <span class="comment">// In either mode, a seperate I/O pins is required for control of the AX88796's</span>
00037 <span class="comment">// hardware RESET line.</span>
00038
00039 <span class="comment">// set the connection type used to communicate with the NIC</span>
00040 <span class="preprocessor">#define NIC_CONNECTION GENERAL_IO</span>
00041 <span class="preprocessor"></span>
00042
00043 <span class="preprocessor">#if NIC_CONNECTION != GENERAL_IO</span>
00044 <span class="preprocessor"></span> <span class="comment">// NIC is memory-mapped starting at this address</span>
00045 <span class="preprocessor"> #define AX88796_MEMORY_MAPPED_OFFSET 0x2000</span>
00046 <span class="preprocessor"></span><span class="preprocessor">#else // NIC Interface through General I/O</span>
00047 <span class="preprocessor"></span> <span class="comment">// AX88796 address port</span>
00048 <span class="preprocessor"> #define AX88796_ADDRESS_PORT PORTB</span>
00049 <span class="preprocessor"></span><span class="preprocessor"> #define AX88796_ADDRESS_DDR DDRB</span>
00050 <span class="preprocessor"></span><span class="preprocessor"> #define AX88796_ADDRESS_MASK 0x1F</span>
00051 <span class="preprocessor"></span> <span class="comment">// AX88796 data port</span>
00052 <span class="preprocessor"> #define AX88796_DATA_PORT PORTA</span>
00053 <span class="preprocessor"></span><span class="preprocessor"> #define AX88796_DATA_DDR DDRA</span>
00054 <span class="preprocessor"></span><span class="preprocessor"> #define AX88796_DATA_PIN PINA</span>
00055 <span class="preprocessor"></span> <span class="comment">// AX88796 control port</span>
00056 <span class="preprocessor"> #define AX88796_CONTROL_PORT PORTD</span>
00057 <span class="preprocessor"></span><span class="preprocessor"> #define AX88796_CONTROL_DDR DDRD</span>
00058 <span class="preprocessor"></span><span class="preprocessor"> #define AX88796_CONTROL_READPIN PD5</span>
00059 <span class="preprocessor"></span><span class="preprocessor"> #define AX88796_CONTROL_WRITEPIN PD4</span>
00060 <span class="preprocessor"></span><span class="preprocessor">#endif</span>
00061 <span class="preprocessor"></span>
00062 <span class="comment">// AX88796 RESET pin</span>
00063 <span class="preprocessor">#define AX88796_RESET_PORT PORTD</span>
00064 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_RESET_DDR DDRD</span>
00065 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_RESET_PIN PD6</span>
00066 <span class="preprocessor"></span>
00067 <span class="comment">// MAC address for this interface</span>
00068 <span class="preprocessor">#ifdef ETHADDR0</span>
00069 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC0 ETHADDR0</span>
00070 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC1 ETHADDR1</span>
00071 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC2 ETHADDR2</span>
00072 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC3 ETHADDR3</span>
00073 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC4 ETHADDR4</span>
00074 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC5 ETHADDR5</span>
00075 <span class="preprocessor"></span><span class="preprocessor">#else</span>
00076 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC0 '0'</span>
00077 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC1 'F'</span>
00078 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC2 'F'</span>
00079 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC3 'I'</span>
00080 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC4 'C'</span>
00081 <span class="preprocessor"></span><span class="preprocessor">#define AX88796_MAC5 'E'</span>
00082 <span class="preprocessor"></span><span class="preprocessor">#endif</span>
00083 <span class="preprocessor"></span>
00084 <span class="preprocessor">#endif</span>
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