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<h1>rtl8019.h</h1><a href="rtl8019_8h.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment">00001 <span class="comment">/*! \file rtl8019.h \brief Realtek RTL8019AS Ethernet Interface Driver. */</span>
00002 <span class="comment">//*****************************************************************************</span>
00003 <span class="comment">//</span>
00004 <span class="comment">// File Name    : 'rtl8019.h'</span>
00005 <span class="comment">// Title        : Realtek RTL8019AS Ethernet Interface Driver</span>
00006 <span class="comment">// Author       : Pascal Stang</span>
00007 <span class="comment">// Created      : 7/6/2004</span>
00008 <span class="comment">// Revised      : 8/22/2005</span>
00009 <span class="comment">// Version      : 0.1</span>
00010 <span class="comment">// Target MCU   : Atmel AVR series</span>
00011 <span class="comment">// Editor Tabs  : 4</span>
00012 <span class="comment">//</span><span class="comment"></span>
00013 <span class="comment">/// \ingroup network</span>
00014 <span class="comment">/// \defgroup rtl8019 Realtek RTL8019AS Ethernet Interface Driver (rtl8019.c)</span>
00015 <span class="comment">/// \code #include "net/rtl8019.h" \endcode</span>
00016 <span class="comment">/// \par Overview</span>
00017 <span class="comment">///     This driver provides initialization and transmit/receive</span>
00018 <span class="comment">/// functions for the Realtek RTL8019AS 10Mb Ethernet Controller and PHY.</span>
00019 <span class="comment">///</span>
00020 <span class="comment">/// Based in part on code by Louis Beaudoin (www.embedded-creations.com).</span>
00021 <span class="comment">/// Thanks to Adam Dunkels and Louis Beaudoin for providing the initial</span>
00022 <span class="comment">/// structure in which to write this driver.</span>
00023 <span class="comment"></span><span class="comment">//</span>
00024 <span class="comment">//*****************************************************************************</span><span class="comment"></span>
00025 <span class="comment">//@{</span>
00026 <span class="comment"></span>
00027 <span class="preprocessor">#ifndef RTL8019_H</span>
00028 <span class="preprocessor"></span><span class="preprocessor">#define RTL8019_H</span>
00029 <span class="preprocessor"></span>
00030 <span class="preprocessor">#define nop()   asm volatile ("nop")</span>
00031 <span class="preprocessor"></span>
00032 <span class="comment">// RTL8019 Control Register Offsets</span>
00033 <span class="comment">// Page 0 - Read/Write</span>
00034 <span class="preprocessor">#define CR          0x00    // Command Register</span>
00035 <span class="preprocessor"></span><span class="preprocessor">#define PSTART      0x01    // Page Start Register</span>
00036 <span class="preprocessor"></span><span class="preprocessor">#define PSTOP       0x02    // Page Stop Register</span>
00037 <span class="preprocessor"></span><span class="preprocessor">#define BNRY        0x03    // Boundary Pointer</span>
00038 <span class="preprocessor"></span><span class="preprocessor">#define RDMAPORT    0x10    // DMA Data Port</span>
00039 <span class="preprocessor"></span><span class="preprocessor">#define MEMR        0x14    // MII/EEPROM Access Register</span>
00040 <span class="preprocessor"></span><span class="preprocessor">#define TR          0x15    // Test Register</span>
00041 <span class="preprocessor"></span><span class="preprocessor">#define SPP_DPR     0x18    // Standard Printer Port Data</span>
00042 <span class="preprocessor"></span><span class="preprocessor">#define SSP_SPR     0x19    // Standard Printer Port Status</span>
00043 <span class="preprocessor"></span><span class="preprocessor">#define SSP_CPR     0x1A    // Standard Printer Port Control</span>
00044 <span class="preprocessor"></span><span class="comment">// Page 0 - Read</span>
00045 <span class="preprocessor">#define TSR         0x04    // Transmit Status Register</span>
00046 <span class="preprocessor"></span><span class="preprocessor">#define NCR         0x05    // Number of Collisions Register</span>
00047 <span class="preprocessor"></span><span class="preprocessor">#define ISR         0x07    // Interrupt Status Register</span>
00048 <span class="preprocessor"></span><span class="preprocessor">#define CRDA0       0x08    // Current Remote DMA Address 0</span>
00049 <span class="preprocessor"></span><span class="preprocessor">#define CRDA1       0x09    // Current Remote DMA Address 1</span>
00050 <span class="preprocessor"></span><span class="preprocessor">#define RSR         0x0C    // Receive Status Register</span>
00051 <span class="preprocessor"></span><span class="preprocessor">#define CNTR0       0x0D</span>
00052 <span class="preprocessor"></span><span class="preprocessor">#define CNTR1       0x0E</span>
00053 <span class="preprocessor"></span><span class="preprocessor">#define CNTR2       0x0F</span>
00054 <span class="preprocessor"></span><span class="preprocessor">#define GPI         0x17    // General-Purpose Input</span>
00055 <span class="preprocessor"></span><span class="preprocessor">#define RSTPORT     0x1F    // Reset</span>
00056 <span class="preprocessor"></span><span class="comment">// Page 0 - Write</span>
00057 <span class="preprocessor">#define TPSR        0x04    // Transmit Page Start Address</span>
00058 <span class="preprocessor"></span><span class="preprocessor">#define TBCR0       0x05    // Transmit Byte Count Register 0</span>
00059 <span class="preprocessor"></span><span class="preprocessor">#define TBCR1       0x06    // Transmit Byte Count Register 1</span>
00060 <span class="preprocessor"></span><span class="preprocessor">#define RSAR0       0x08    // Remote Start Address Register 0</span>
00061 <span class="preprocessor"></span><span class="preprocessor">#define RSAR1       0x09    // Remote Start Address Register 1</span>
00062 <span class="preprocessor"></span><span class="preprocessor">#define RBCR0       0x0A    // Remote Byte Count 0</span>
00063 <span class="preprocessor"></span><span class="preprocessor">#define RBCR1       0x0B    // Remote Byte Count 1</span>
00064 <span class="preprocessor"></span><span class="preprocessor">#define RCR         0x0C    // Receive Config Register</span>
00065 <span class="preprocessor"></span><span class="preprocessor">#define TCR         0x0D    // Transmit Config Register</span>
00066 <span class="preprocessor"></span><span class="preprocessor">#define DCR         0x0E    // Data Config Register</span>
00067 <span class="preprocessor"></span><span class="preprocessor">#define IMR         0x0F    // Interrupt Mask Register</span>
00068 <span class="preprocessor"></span><span class="preprocessor">#define GPOC        0x17    // General-Purpose Output Control</span>
00069 <span class="preprocessor"></span><span class="comment">// Page 1 - Read/Write</span>
00070 <span class="preprocessor">#define PAR0        0x01    // Physical Address Register 0</span>
00071 <span class="preprocessor"></span><span class="preprocessor">#define PAR1        0x02    // Physical Address Register 1</span>
00072 <span class="preprocessor"></span><span class="preprocessor">#define PAR2        0x03    // Physical Address Register 2</span>
00073 <span class="preprocessor"></span><span class="preprocessor">#define PAR3        0x04    // Physical Address Register 3</span>
00074 <span class="preprocessor"></span><span class="preprocessor">#define PAR4        0x05    // Physical Address Register 4</span>
00075 <span class="preprocessor"></span><span class="preprocessor">#define PAR5        0x06    // Physical Address Register 5</span>
00076 <span class="preprocessor"></span><span class="preprocessor">#define CURR        0x07    // Page 1</span>
00077 <span class="preprocessor"></span><span class="preprocessor">#define CPR         0x07    // Current Page Register</span>
00078 <span class="preprocessor"></span>
00079 <span class="preprocessor">#define RTL_EECR    0x01    // page 3</span>
00080 <span class="preprocessor"></span><span class="preprocessor">#define CR9346      0x01    // Page 3</span>
00081 <span class="preprocessor"></span><span class="preprocessor">#define CONFIG2     0x05    // page 3</span>
00082 <span class="preprocessor"></span><span class="preprocessor">#define CONFIG3     0x06    // page 3</span>
00083 <span class="preprocessor"></span>
00084 <span class="comment">// RTL8019/NE2000 CR Register Bit Definitions</span>
00085 <span class="preprocessor">#define  PS1        0x80 </span>
00086 <span class="preprocessor"></span><span class="preprocessor">#define  PS0        0x40 </span>
00087 <span class="preprocessor"></span><span class="preprocessor">#define  RD2        0x20 </span>
00088 <span class="preprocessor"></span><span class="preprocessor">#define  RD1        0x10 </span>
00089 <span class="preprocessor"></span><span class="preprocessor">#define  RD0        0x08 </span>
00090 <span class="preprocessor"></span><span class="preprocessor">#define  TXP        0x04 </span>
00091 <span class="preprocessor"></span><span class="preprocessor">#define  START      0x02 </span>
00092 <span class="preprocessor"></span><span class="preprocessor">#define  STOP       0x01 </span>
00093 <span class="preprocessor"></span><span class="comment">// RTL8019/NE2000 ISR Register Bit Definitions</span>
00094 <span class="preprocessor">#define  RST        0x80</span>
00095 <span class="preprocessor"></span><span class="preprocessor">#define  RDC        0x40</span>
00096 <span class="preprocessor"></span><span class="preprocessor">#define  OVW        0x10</span>
00097 <span class="preprocessor"></span><span class="preprocessor">#define  RXE        0x08</span>
00098 <span class="preprocessor"></span><span class="preprocessor">#define  TXE        0x04</span>
00099 <span class="preprocessor"></span><span class="preprocessor">#define  PTX        0x02</span>
00100 <span class="preprocessor"></span><span class="preprocessor">#define  PRX        0x01</span>
00101 <span class="preprocessor"></span><span class="comment">// RTL8019/NE2000 RCR Register Bit Definitions</span>
00102 <span class="preprocessor">#define  MON        0x20</span>
00103 <span class="preprocessor"></span><span class="preprocessor">#define  PRO        0x10</span>
00104 <span class="preprocessor"></span><span class="preprocessor">#define  AM         0x08</span>
00105 <span class="preprocessor"></span><span class="preprocessor">#define  AB         0x04</span>
00106 <span class="preprocessor"></span><span class="preprocessor">#define  AR         0x02</span>
00107 <span class="preprocessor"></span><span class="preprocessor">#define  SEP        0x01</span>
00108 <span class="preprocessor"></span><span class="comment">// RTL8019/NE2000 TCR Register Bit Definitions</span>
00109 <span class="preprocessor">#define  FDU        0x80    // full duplex</span>
00110 <span class="preprocessor"></span><span class="preprocessor">#define  PD         0x40    // pad disable</span>
00111 <span class="preprocessor"></span><span class="preprocessor">#define  RLO        0x20    // retry of late collisions</span>
00112 <span class="preprocessor"></span><span class="preprocessor">#define  LB1        0x04    // loopback 1</span>
00113 <span class="preprocessor"></span><span class="preprocessor">#define  LB0        0x02    // loopback 0</span>
00114 <span class="preprocessor"></span><span class="preprocessor">#define  CRC        0x01    // generate CRC</span>
00115 <span class="preprocessor"></span><span class="comment">// RTL8019 EECR Register Bit Definitions</span>
00116 <span class="preprocessor">#define  EEM1       0x80</span>
00117 <span class="preprocessor"></span><span class="preprocessor">#define  EEM0       0x40</span>
00118 <span class="preprocessor"></span><span class="preprocessor">#define  EECS       0x08</span>
00119 <span class="preprocessor"></span><span class="preprocessor">#define  EESK       0x04</span>
00120 <span class="preprocessor"></span><span class="preprocessor">#define  EEDI       0x02</span>
00121 <span class="preprocessor"></span><span class="preprocessor">#define  EEDO       0x01</span>
00122 <span class="preprocessor"></span>
00123 
00124 <span class="comment">// RTL8019 Initial Register Values</span>
00125 <span class="comment">// RCR : INT trigger active high and Accept Broadcast ENET packets</span>
00126 <span class="preprocessor">#define RCR_INIT        (AB)</span>
00127 <span class="preprocessor"></span><span class="preprocessor">#define DCR_INIT        0x58    // FIFO thrsh. 8bits, 8bit DMA transfer</span>
00128 <span class="preprocessor"></span><span class="comment">// TCR : default transmit operation - CRC is generated</span>
00129 <span class="preprocessor">#define TCR_INIT        0x00</span>
00130 <span class="preprocessor"></span><span class="comment">// IMR : interrupt enabled for receive and overrun events</span>
00131 <span class="preprocessor">#define IMR_INIT        0x11    // PRX and OVW interrupt enabled</span>
00132 <span class="preprocessor"></span><span class="comment">// buffer boundaries</span>
00133 <span class="comment">//  transmit has 6 256-byte pages</span>
00134 <span class="comment">//  receive has 26 256-byte pages</span>
00135 <span class="comment">//  entire available packet buffer space is allocated</span>
00136 <span class="preprocessor">#define TXSTART_INIT    0x40</span>
00137 <span class="preprocessor"></span><span class="preprocessor">#define RXSTART_INIT    0x46</span>
00138 <span class="preprocessor"></span><span class="preprocessor">#define RXSTOP_INIT     0x60</span>
00139 <span class="preprocessor"></span>
00140 <span class="comment">// Ethernet constants</span>
00141 <span class="preprocessor">#define ETHERNET_MIN_PACKET_LENGTH  0x3C</span>
00142 <span class="preprocessor"></span><span class="comment">//#define ETHERNET_HEADER_LENGTH        0x0E</span>
00143 
00144 <span class="comment">// offsets into ax88796 ethernet packet header</span>
00145 <span class="preprocessor">#define  PKTHEADER_STATUS       0x00    // packet status</span>
00146 <span class="preprocessor"></span><span class="preprocessor">#define  PKTHEADER_NEXTPAGE     0x01    // next buffer page</span>
00147 <span class="preprocessor"></span><span class="preprocessor">#define  PKTHEADER_PKTLENL      0x02    // packet length low</span>
00148 <span class="preprocessor"></span><span class="preprocessor">#define  PKTHEADER_PKTLENH      0x03    // packet length high</span>
00149 <span class="preprocessor"></span>
00150 
00151 <span class="comment">// functions</span>
00152 <span class="preprocessor">#include "<a class="code" href="nic_8h.html">nic.h</a>"</span>
00153 
00154 <span class="comment">// setup ports for I/O</span>
00155 <span class="keywordtype">void</span> rtl8019SetupPorts(<span class="keywordtype">void</span>);
00156 
00157 <span class="comment">// read ax88796 register</span>
00158 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> rtl8019Read(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> address);
00159 
00160 <span class="comment">// write ax88796 register</span>
00161 <span class="keywordtype">void</span> rtl8019Write(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> address, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> data);
00162 
00163 <span class="comment">// initialize the ethernet interface for transmit/receive</span>
00164 <span class="keywordtype">void</span> rtl8019Init(<span class="keywordtype">void</span>);
00165 
00166 <span class="comment">// packet transmit functions</span>
00167 <span class="keywordtype">void</span> rtl8019BeginPacketSend(<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> packetLength);
00168 <span class="keywordtype">void</span> rtl8019SendPacketData(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> * localBuffer, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> length);
00169 <span class="keywordtype">void</span> rtl8019EndPacketSend(<span class="keywordtype">void</span>);
00170 
00171 <span class="comment">// packet receive functions</span>
00172 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> rtl8019BeginPacketRetreive(<span class="keywordtype">void</span>);
00173 <span class="keywordtype">void</span> rtl8019RetreivePacketData(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> * localBuffer, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> length);
00174 <span class="keywordtype">void</span> rtl8019EndPacketRetreive(<span class="keywordtype">void</span>);
00175 
00176 <span class="comment">// Processes RTL8019 interrupts.</span>
00177 <span class="comment">// Currently, this function looks only for a receive overflow condition.</span>
00178 <span class="comment">// The function need not be called in response to an interrupt,</span>
00179 <span class="comment">// but can be executed just before checking the receive buffer for incoming packets.</span>
00180 <span class="keywordtype">void</span> rtl8019ProcessInterrupt(<span class="keywordtype">void</span>);
00181 
00182 <span class="comment">// execute procedure for recovering from a receive overflow</span>
00183 <span class="comment">// this should be done when the receive memory fills up with packets</span>
00184 <span class="keywordtype">void</span> rtl8019ReceiveOverflowRecover(<span class="keywordtype">void</span>);
00185 
00186 <span class="comment">// formatted print of all important RTL8019 registers</span>
00187 <span class="keywordtype">void</span> rtl8019RegDump(<span class="keywordtype">void</span>);
00188 
00189 <span class="preprocessor">#endif</span>
00190 <span class="preprocessor"></span><span class="comment">//@}</span>
</span></pre></div><hr size="1"><address style="align: right;"><small>Generated on Sun Oct 29 03:41:07 2006 for Procyon AVRlib by&nbsp;
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